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参数资料
| 型号： | SY89536LHZ |
| 厂商： | MICREL INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 89536 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 |
| 封装： | LEAD FREE, TQFP-64 |
| 文件页数： | 10/16页 |
| 文件大小： | 101K |
| 代理商： | SY89536LHZ |
3
Precision Edge
SY89536L
Micrel, Inc.
M9999-010808
hbwhelp@micrel.com or (408) 955-1690
PIN DESCRIPTION
Power
Pin Number
Pin Name
Pin Function
60, 61
V
CC_Logic
Power for Core Logic: Connect to 3.3V supply. 3.3V power pins are not internally
connected on the die, and must be connected together on the PCB.
62
V
CCA
Power for PLL: Connect to “quiet” 3.3V supply. 3.3V power pins are not internally
connected on the die, and must be connected together on the PCB.
55
V
CCOA
Power for Output Drivers: Connect V
CCOA and VCCOC pins to 3.3V supply and VCCOB
30, 31, 50
V
CCOB
pins to 1.8V supply.
21
V
CCOC
4, 9, 25, 63, 29
GND
Ground: All GND pins must be tied together on the PCB. Exposed pad must be
(exposed pad)
soldered to a ground plane.
Configuration
Pin Number
Pin Name
Pin Function
4
VCO_SEL
LVTTL/CMOS Compatible Input: Selects between internal or external VCO. When
tied LOW (GND) internal VCO is selected. For external VCO, leave floating (default
condition is logic HIGH). Internal 25k
pull-up.
5, 6
PSEL(1:0)
LVTTL/CMOS Compatible Input: Controls input frequency pre divider. Internal 25k
pull-up. Default is logic HIGH. See
“Pre-Divide Frequency Select” table.
7
LOOP REF
Analog Input/Output: Provides the reference voltage for PLL loop filter.
8
LOOP FILTER
Analog Input/Output: Provides the loop filter for PLL. See
“External Loop Filter
Considerations” for loop filter values.
13,14,15,16
M (3:0)
LVTTL/CMOS Compatible Input: Used to change the PLL feedback divider. Internal 25k
pull-up. M0 = LSB. Default is logic HIGH. See
“Feedback Divide Select” table.
22, 23, 24
FSEL_C (2:0)
LVTTL/CMOS Compatible Input: Bank C post-divide select. Internal 25k
pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select” table. FSEL_C0 = LSB.
26, 27, 28
FSEL_B (2:0)
LVTTL/CMOS Compatible Input: Bank B post-divide select. Internal 25k
pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select” table. FSEL_B0 = LSB.
56, 57, 58
FSEL_A (2:0)
LVTTL/CMOS Compatible Input: Bank A post-divide select. Internal 25k
pull-up.
Default is logic HIGH. See
Post-Divide Frequency Select” table. FSEL_A0 = LSB.
59
OUT_SYNC
Banks A, B, C Output Synchronous Control: (LVTTL/CMOS compatible).
Internal 25k
pull-up. After any bank has been programmed, toggle with a HIGH-LOW-HIGH
pulse to resynchronize all output banks.
Input/Output
Pin Number
Pin Name
Pin Function
1, 2, 3
NC
No Connect: Leave floating.
10, 11
REFCLK,
Reference Input: This flexible input accepts any input TTL/CMOS, LVPECL, LVDS,
/REFCLK
HSTL, SSTL logic levels. See
“Input Interface” section.
12
VBB_REF
Reference Output Voltage. Used for single-ended input. Maximum sink/source current = 0.5mA.
51, 52, 53, 54
QA1 to QA0
Bank A 100k LVPECL Output Drivers: Output frequency is controlled by FSEL_A (0:2).
Terminate outputs with 50
to V
CC –2V. See “Output Termination Recommendations”
section.
32–49
QB8 to QB0
Bank B Output Drivers: Differential HSTL outputs. See
“Output Termination Recommendations”
section. Output frequency is controlled by FSEL_B (0:2).
17, 18, 19, 20
QC1 to QC0
Bank C 100k LVPECL Output Drivers: Output frequency is controlled by FSEL_C (0:2).
Terminate outputs with 50
to V
CC–2V. See “Output Termination Recommendations” section.
64
NC
No Connect: Leave floating.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89536LHZ TR | 功能描述:时钟合成器/抖动清除器 3.3V Programmable HSTL/LVPECL Synthesizer (Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| SY89536LHZTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER |
| SY89537L | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V Precision LVPECL and LVDS |
| SY89537L_10 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V Precision LVPECL and LVDS |
| SY89537LMG | 功能描述:IC SYNTHESIZR LVPECL/LVDS 44-MLF RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:Precision Edge® 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
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