参数资料
| 型号： | SY89828LHG |
| 厂商： | Micrel Inc |
| 文件页数： | 4/13页 |
| 文件大小： | 0K |
| 描述： | IC CLK BUF MUX TRNSL 2:10 64TQFP |
| 标准包装： | 160 |
| 系列： | Precision Edge® |
| 类型： | 扇出缓冲器（分配），多路复用器，变换器 |
| 电路数： | 2 |
| 比率 - 输入:输出： | 2:10 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | LVDS，PECL |
| 输出： | LVDS |
| 频率 - 最大： | 1GHz |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-TQFP 裸露焊盘 |
| 供应商设备封装： | 64-EP-TQFP |
| 包装： | 托盘 |
12
Precision Edge
SY89828L
Micrel, Inc.
M9999-012208
hbwhelp@micrel.com or (408) 955-1690
Part Number
Function
Data Sheet Link
SY55855V
Dual CML/PECL/LVPECL-to-LVDS Translator
www.micrel.com/product-info/products/sy55855v.shtml
SY89825U
2.5/3.3V 1:22 High-Performance, Low-Voltage PECL
Bus Clock Driver & Translator w/Internal Termination
www.micrel.com/product-info/products/sy89825u.shtml
SY89826U
3.3V 1GHz Precision 1:22 LVDS Fanout Buffer
with 2:1 Input Mux
www.micrel.com/product-info/products/sy89826u.shtml
SY89829U
2.5/3.3V High-Performance, Dual 1:10 LVPECL Clock
Driver w/Internal Termination & Redundant Switchover
www.micrel.com/product-info/products/sy89829u.shtml
M-0317
HBW Solutions
www.micrel.com/product-info/products/solutions.shtml
Exposed pad
Amkor Exposed Pad Application Note
www.amkor.com/products/notes_papers/ePad.pdf
RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION
DETAILED DESCRIPTION
The SY89828L is a precision dual 1:10 fanout buffer. It
allows either LVPECL or LVDS inputs, selectable by an
input muxes, and outputs 2 sets of 10 LVDS output pairs.
The device features 2 synchronous output enables. The
SY89828L provides extremely low skew across its outputs.
LVPECL_CLKA, LVPECL_CLKB
The SY89828L allows two inputs with standard LVPECL
voltage swings. These inputs may be adjusted per the data
sheet characteristics regarding the CMR and minimum input
swing. As the SY89828L contains no appropriate internal
termination, upstream devices need to be properly
terminated to provide the proper LVPECL input swing. If
not being used (CLK_SEL1 and CLK_SEL2 are LOW), these
input pairs may be left floating, as they are internally
terminated to ground via 75k pull-down resistors.
LVDS_CLKA, LVDS_CLKB
The SY89828L allows two inputs with standard LVDS
voltage swings. The SY89828L provides an appropriate
internal 100 termination resistor. Hence, upstream LVDS
devices do not require external termination to drive the
SY89828L. If not being used (CLK_SEL1 and CLK_SEL2
are HIGH), these inputs pair may be left floating.
SEL1, SEL2 TTL Inputs
The SEL1 Input is used to select either CLKA (SEL1 is
LOW) or CLKB (SEL1 is HIGH) for the Q0-Q9 differential
output pairs. In a similar manner, The SEL2 Input is used to
select either CLKA (SEL2 is LOW)or CLKB (SEL2 is HIGH)
for the Q10-Q19 differential output pairs.
CLK_SEL1, CLK_SEL2 TTL Inputs
The CLK_SEL1 Input is used to select either LVDS_CLKA
(CLK_SEL1 is LOW) or LVPECL_CLKA (CLK_SEL1 is
HIGH). In a similar manner, The CLK_SEL2 Input is used
to select either LVDS_CLKB (CLK_SEL2 is LOW) or
LVPECL_CLKB (CLK_SEL2 is HIGH).
OE1, OE2 TTL Inputs
The SY89828L’s output enable functions are designed to
disable the outputs only when the outputs are LOW. The
OE1 TTL Input controls the Q0-Q9 outputs and OE2 controls
the Q10-Q19 outputs. This avoids the possibility of
generating runt pulses. The OE1 and OE2 inputs are
asynchronous inputs, but operate as synchronous enables.
For synchronous operation, please adhere to the specific
setup and hold times. When disabled, the Q outputs are
LOW and the /Q outputs are HIGH.
Q0-Q9, Q10-Q19 LVDS Outputs
The SY89828L’s LVDS outputs swing typically 350mV
around a 1.25V common mode voltage above ground. The
common mode voltage has tight limits to permit large
variations in ground between an LVDS driver and receiver.
Also, change in common mode voltage, as a function of
data input is kept tight to keep EMI low. Each of the
SY89828L’s LVDS outputs should be terminated with a 100
termination resistor including any unused output pairs. This
ensures the best jitter and skew performance of the device.
In a similar manner, The SEL2 Input is used to select either
CLKA (SEL2 is LOW)or CLKB (SEL2 is HIGH) for the Q10-
Q19 differential output pairs.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89828LHI | 功能描述:IC CLK BUF MUX TRNSL 2:10 64TQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:Precision Edge® 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
| SY89828LHITR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V 1GHz DUAL 1:10 PRECISION LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX |
| SY89828LHY | 功能描述:时钟合成器/抖动清除器 3.3V Dual 1:10 LVDS Fanout/Translator (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| SY89828LHY TR | 功能描述:时钟合成器/抖动清除器 3.3V Dual 1:10 LVDS Fanout/Translator (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| SY89828LHYTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V 1GHz DUAL 1:10 PRECISION LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX |
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