参数资料
型号: SY89829UHG
厂商: MICREL INC
元件分类: 时钟及定时
英文描述: 89829 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
封装: LEAD FREE, TQFP-64
文件页数: 7/10页
文件大小: 113K
代理商: SY89829UHG
6
Precision Edge
SY89829U
Micrel, Inc.
M9999-120205
hbwhelp@micrel.com or (408) 955-1690
NOTES:
1. Outputs loaded with 50 to VCC – 2V. Airflow ≥ 300lfpm.
2. f
MAX is defined as the maximum toggle frequency measured. Measured with a 800mV input signal, output swing ≥ 200mV, and all loading with 50
to V
CC –2V.
3. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential
output signals.
4. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same
voltage and temperature.
5. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
voltage and temperature. Part-to-part skew is the total skew difference; pin-to-pin skew + part-to-part skew.
6. Set-up and hold time applies to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,
set-up and hold time does not apply. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures
outputs remain disabled during the next clock cycle. OE LOW to HIGH transition enables normal operation of the next input clock.
AC ELECTRICAL CHARACTERISTICS(1)
TA = –40°CTA = +25°CTA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
fMAX
Max Toggle Frequency(2)
1—
—1—
1—
GHz
tPD
Propagation Delay
ns
(Differential)(3)
LVPECL IN
0.900
1.5
0.900
1.2
1.5
0.900
1.5
LVDS IN
1.1
1.7
1.1
1.7
1.1
1.7
tSKEW
Within-Device Skew(4)
35
—20
35—
—35
ps
Part-to-Part Skew(5)
100
200
100
200
100
200
ps
tS(OE)
OE Set-Up Time(6)
1.0
1.0
1.0
ns
tH(OE)
OE Hold Time(6)
0.5
0.5
0.5
ns
tr
Output Rise/Fall Time
300
600
300
450
600
300
600
ps
tf
(20% – 80%)
t(switchover) Input Switchover
1.2
1.2
1.2
ns
CLK_SEL-to-valid output
VCC = 2.37V to 3.6V, GND = 0V
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