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参数资料
| 型号： | SY89833ALMITR |
| 厂商： | MICREL INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 89833 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| 封装： | 3 X 3 MM, MLF-16 |
| 文件页数： | 9/12页 |
| 文件大小： | 413K |
| 代理商： | SY89833ALMITR |
Micrel, Inc.
SY89833AL
March 2009
6
M9999-032609-A
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(7)
VCC = 3.3V ±10%, RL = 100 across the output, TA = –40°C to +85°C, unless otherwise noted.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Frequency
VOUT ≥ 200mV
2.0
GHz
tPD
Propagation Delay
250
470
ps
Note 8
5
20
ps
tSKEW
Within-Device Skew
Part-to-Part Skew
Note 9
200
ps
tS
Set-Up Time
Note 10
400
ps
tH
Hold Time
Note 10
400
ps
Data
Random Jitter (RJ)
Deterministic Jitter (DJ)
Note 11
Note 12
1
10
psRMS
psPP
Clock
Cycle-to-Cycle Jitter
Total Jitter (TJ)
Note 13
Note 14
1
10
psRMS
psPP
f = 622.08MHz, Note 15
0.07
psRMS
tJITTER
Additive Phase Jitter
f = 156.25MHz, Note 15
0.635
psRMS
tr, tf
Output Rise/Fall Times
(20% to 80%)
At full output swing.
60
110
190
ps
Duty Cycle
Differential I/O
47
53
%
Notes:
7.
High-frequency AC parameters are guaranteed by design and characterization.
8.
Within device skew is measured between two different outputs under identical input transitions.
9.
Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
10. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,
set-up and hold times do not apply.
11. Random jitter is measured with a K28.7 pattern, measured at ≤fMAX.
12. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223–1 PRBS pattern.
13. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –
Tn+1, where T is the time between rising edges of the output signal.
14. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 1012 output edges will deviate by
more than the specified peak-to-peak jitter value.
15. Integrated over the range of 12kHz to 20MHz.
Timing Diagrams
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89833L | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V, 2GHz ANY-DIFFERENTIAL INPUT-TO-LVDS 1:4 FANOUT BUFFER/TRANSLATOR W/ INTERNAL TERMINATION |
| SY89833L_07 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V ULTRA-PRECISION 1:4 LVDS FANOUT BUFFER/TRANSLATOR WITH INTERNAL TERMINATION |
| SY89833LMG | 功能描述:时钟缓冲器 3.3V 1:4 PECL Fanout Buffer (I Temp, Green) RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SY89833LMG TR | 功能描述:时钟缓冲器 3.3V 1:4 PECL Fanout Buffer (I Temp, Green) RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SY89833LMGTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V ULTRA-PRECISION 1:4 LVDS FANOUT BUFFER/TRANSLATOR WITH INTERNAL TERMINATION |
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