参数资料
型号: T89C51CC02CA-SISIM
厂商: Atmel
文件页数: 129/159页
文件大小: 0K
描述: IC 8051 MCU FLASH 16K 28PLCC
标准包装: 37
系列: AT89C CAN
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: CAN,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 20
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 28-PLCC
包装: 管件
配用: AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN
其它名称: T89C51CC02CASISIM
71
AT/T89C51CC02
4126L–CAN–01/08
Watchdog Timer
During Power-down
Mode and Idle
In Power-down mode the oscillator stops, which means the WDT also stops. While in
Power-down mode, the user does not need to service the WDT. There are 2 methods of
exiting Power-down mode: by a hardware reset or via a level activated external interrupt
which is enabled prior to entering Power-down mode. When Power-down is exited with
hardware reset, the watchdog is disabled. Exiting Power-down with an interrupt is signif-
icantly different. The interrupt shall be held low long enough for the oscillator to stabilize.
When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from
resetting the device while the interrupt pin is held low, the WDT is not started until the
interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service
for the interrupt used to exit Power-down.
To ensure that the WDT does not overflow within a few states of exiting powerdown, it is
best to reset the WDT just before entering powerdown.
In the Idle mode, the oscillator continues to run. To prevent the WDT from resetting
T89C51CC02 while in Idle mode, the user should always set up a timer that will periodi-
cally exit Idle, service the WDT, and re-enter Idle mode.
Register
Table 52. WDTPRG Register
WDTPRG (S:A7h) – Watchdog Timer Duration Programming register
Reset Value = XXXX X000b
765
43210
-----
S2
S1
S0
Bit
Number
Bit
Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2S2
Watchdog Timer Duration selection bit 2
Work in conjunction with bit 1 and bit 0.
1S1
Watchdog Timer Duration selection bit 1
Work in conjunction with bit 2 and bit 0.
0S0
Watchdog Timer Duration selection bit 0
Work in conjunction with bit 1 and bit 2.
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