参数资料
型号: T89C51CC02UA-TDSIM
厂商: Atmel
文件页数: 33/159页
文件大小: 0K
描述: IC 8051 MCU FLASH 16K 24-SOIC
标准包装: 31
系列: AT89C CAN
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: CAN,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 20
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
包装: 管件
配用: AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN
其它名称: T89C51CC02UATDSIM
128
AT/T89C51CC02
4126L–CAN–01/08
The bits SCH0 to SCH2 in ADCON register are used for the analog input channel
selection.
Table 102. Selected Analog input
Voltage Conversion
When the ADCIN is equals to VAREF the ADC converts the signal to 3FFh (full scale). If
the input voltage equals VAGND, the ADC converts it to 000h. Input voltage between
VAREF and VAGND are a straight-line linear conversion. All other voltages will result in
3FFh if greater than VAREF and 000h if less than VAGND.
Note that ADCIN should not exceed VAREF absolute maximum range (See section
“AC-DC”).
Clock Selection
The ADC clock is the same as CPU.
The maximum clock frequency is defined in the DC parmeter for A/D converter. A pres-
caler is featured (ADCCLK) to generate the ADC clock from the oscillator frequency.
if PRS = 0 then F
ADC = Fperiph / 64
if PRS > 0 then F
ADC = Fperiph / 2 x PRS
Figure 54. A/D Converter Clock
ADC Standby Mode
When the ADC is not used, it is possible to set it in standby mode by clearing bit ADEN
in ADCON register. In this mode the power dissipation is reduced.
SCH2
SCH1
SCH0
Selected Analog Input
00
0
AN0
00
1
AN1
01
0
AN2
01
1
AN3
10
0
AN4
10
1
AN5
11
0
AN6
11
1
AN7
Prescaler ADCLK
A/D
Converter
ADC Clock
CPU
CLOCK
CPU Core Clock Symbol
÷ 2
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