TA2018FN
2002-10-30
3
Application Note
1. PW SW
It is necessary to connect an external pull-down resistor with the terminal PW SW (pin 6), in case that this IC is
turned on due to external noise etc.
2. Designing of coil
This IC has the output voltage by means of boosting the oscillation voltage, derived from Hartley type oscillator
circuit and of voltage-double rectifier with C3, D1 and D2.
(1)
Designing of oscillation frequency
2
C
3
L
2
1
osc
f
×
p
≒
(2)
Coil turns can be designed as following:
Vosc (p-p) = 2 (VCC (min) - VCE1 (sat))
p)
p-
osc
V
O
V
n2
n3
n
(
=
≒
(Note)
VCC (min) : Minimum of supply voltage designed by a equipment
VCE1 (sat): Saturation voltage of Q1
n
: Coil turns ratio (L2, L3)
VO
: Output voltage (VO ≒ 14.3V)
The turn of L1 is designed, so as to make the terminal of FB be about 200~300mVp-p through C1. The turn
of L1 should be small, and the capacitance of C1 and Q0 of coil should be large, for the oscillation start at
turning power on.
(3)
Allowance is advisable for coil design of n, Q0. However, spurious radiation can be reduced, in case that the
output current and n of coil don't make large.
3. Pattern diagram
The Fig.2 shows the oscillation loop. This
pattern diagram should be small, because
spurious radiation due to the oscillation is
reduced.
The Fig.3 shows the rectifier loop. This pattern
diagram should be the small, because
spurious radiation due to the switching
rectifier is reduced. The two loops should be
isolated from other DC lines.