TA7368P / F
2002-10-30
2
Precaution For Use And Application
1. Input stage
The input stage of power amplifier (equivalent circuit) is comprised of a
PNP differential pair (Q2 and Q3) preceded by a PNP emitter follower
(Q1) which allows DC referencing of the source signal to ground. This
eliminated the need for an input coupling capacitor. However, in case the
brush noise of volume becomes a problem, provide serially a coupling
capacitor to the input side.
2. Adjustment of voltage gain
The voltage gain is fixed at GV≒40dB by the resistors (R4 and R5) in IC,
however, its reduction is possible through adding Rf as shown in Figure 2.
In this case, the voltage gain is obtained by the following equation.
f
R
4
R
f
R
4
R
5
R
og
20
V
G
+
=l
It is recommended to use this IC with the voltage gain of GV = 28dB or
over.
3. Ripple rejection ratio
Adding CRIP, to ripple terminal 2 as shown in Figure 3, the ripple
rejection ratio is improved from -25dB typ. to -45dB typ.
4. Power dissipation
Care should be taken to use this IC below maximum power dissipation.
Because it may over maximum rating depending on operating condition.
TA7368P
PD = 900mW (Ta = 25°C)
TA7368F
PD = 400mW (Ta = 25°C)
5. Phase-compensation
Small temperature coefficient and excellent frequency characteristic is needed by capacitors below.
Oscillation preventing capacitors for power amplifier output
Bypass capacitor for ripple filter
Capacitor between VCC and GND
Fig.2
Vin
+
Rf
90
10
R4
R5
+
1 / 4
3 / 6
IN
NF
RIPPLE
+
CRIP
2 / 5
Fig.3
Fig.1
/
9 / 2
1 / 4
3 / 6
5 / 8
FROM PIN 7 / 10
: TA7368P / TA7368F
D1
27k
R
4
R
1
R5
Q1 Q4
Q2Q3