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TA8227P
2002-03-05
3
3. Input stage
The input circuit of this IC is as shown in Figure 2.
PNP Tr: Q1 is provided in the input circuit so as to make its usage possible without the input coupling
capacitor.
However, at pin 6 and 7, max 60 mV offset voltage is produced.
Application after checking volume slide noise is recommended.
For cutting the volume slide noise, insert the input capacitor: CIN in series to interrupt the DC component.
Figure 2
4. Oscillation preventive measures (Note 1)
For oscillation preventive capacitor C6 and C7 between the output terminal and GND, it is recommended to
use polyester film capacitor having good characteristics for temperature and for high frequency.
Since the characteristics of the capacitor is liable to be influenced by the temperature, use this capacitor
after the temperature test to check the oscillation allowance.
In addition, as the position of the electrolytic capacitor has a remarkable influence on the oscillation,
connect C10 to VCC at the nearest possible position from power GND.
At using this application with the voltage gain reduced, oscillation is liable to be produced. Apply the
capacitor after checking enough for its capacity, type and mounting position.
Note 1: As the oscillation allowance varies according to the printed pattern layout, the standard printed board
of TOSHIBA is recommended to be referred to design it.
5. Power ON/OFF switch
There is power ON/OFF switch at pin 1. However, output power is changed by pin 1 supply voltage when
pin 1 supply voltage is not same pin 12 supply voltage, after referring to attached data, select pin 1 supply
voltage.
6. Input voltage
When the excessive signal is input, turning-up is produced in the clip waveform. The turning-up point is
Vin = 300 mVrms (typ.) : VCC = 9 V, RL = 4 , f = 1 kHz: Enough care must be taken for this phenomenon.