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TDF8554J
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NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 31 August 2011
17 of 56
NXP Semiconductors
TDF8554J
4
45 W power amplifier with multiple voltage regulator
7.5.2 DC offset detection
The offset detection can be performed with no input signal (for instance when the DSP is
muted after a start-up) or with an input signal. An I2C-bus read of the output offset is
performed, the I2C-bus latches of DBx[D2] are set. If the amplifier BTL output voltage is
within a window with a threshold of 1.3 V (typical), the latches of DBx[D2] are reset and
the setting is disabled. If for example, after 1 s another I2C-bus read is performed and the
offset bits are still set, the output did not cross the offset threshold during the last 1 s; see
Figure 11. This can mean either a frequency below 1 Hz was applied (1 s I2C-bus read interval) or an output offset of more than 1.3 V is present.
7.5.3 AC load detection
The AC load detection, set with IB1[D1] = 1, is used to detect if AC-coupled speakers
such as tweeters are connected correctly. The detection requires a 19 kHz sine wave to
be applied to the inputs of the amplifier. A high current AC-load detection mode can be
selected, for example during car assembly, or a low current AC-load detection mode, for
example during switch on of car radio. The output voltage over the load impedance
generates an amplifier current. If the amplifier peak current exceeds a 500 mA (peak)
threshold (or 275 mA peak in low current mode) four times, the AC-load detection bit is
set. The 4 ‘threshold cross’ counter is used to prevent false AC-load detection caused by
switching the input signal on or off.
Fig 11. Offset detection
001aam700
reset, setting
disabled
offset
threshold
time
Vo = (OUT+ - OUT-)
offset
threshold
time
read
→
set bit
1 second:
read
→ offset,
DBx[D2] set
1 second:
read
→ no offset,
DBx[D2] reset
Vo = (OUT+ - OUT-)