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参数资料
| 型号： | TAS3004PFBRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封装： | GREEN, PLASTIC, TQFP-48 |
| 文件页数： | 41/84页 |
| 文件大小： | 671K |
| 代理商： | TAS3004PFBRG4 |
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7–1
7 Microcontroller Operation
The TAS3004 device contains an internal microcontroller programmed by Texas Instruments to perform
housekeeping and interface functions. Additionally, it handles I2C communication and general purpose input
functions.
7.1
General Description
The microcontroller uses a 256fS system clock and can access up to 8K bytes of memory. It interfaces with the digital
audio interface I2C master/slave for downloading data and coefficients. It also interfaces with two internal DSPs for
transferring coefficients and other information.
The TAS3004 coefficients are loaded through I2C in the master or slave mode. Standard audio processing functions
(volume, bass, and treble) can be controlled/activated through external switches connected to the six GPI terminals.
Upon reset, the internal microcontroller sets all coefficients and audio parameters to the default values. See
Section 7.2.2 for default values.
If the TAS3004 address is 68h (ADDR_SEL=0), it becomes the bus master device and attempts to load parameters
and coefficients from the external EPROM. If no EPROM is present, the TAS3004 device remains in its default
condition. If addresses other than 68h/69h are set, the TAS3004 device only operates as an I2C slave device.
If the microcontroller determines the TAS3004 device has an I2C address of 68h/69h and the EPROM is present, the
microcontroller downloads coefficients from the EPROM. Once the download is complete, it enables the serial audio
in the mode defined by an I2C write to the MCR to transfer data into and out of the device. Before reading the EPROM,
the serial audio port defaults to I2S mode.
The TAS3004 device allows the user to update volume, bass, and treble dynamically by an I2C slave command or
by a simple GPI switch input. The GPI can select volume up and down, bass/treble up and down, or digital
equalizations. Up to five different equalizations (that is, flat, jazz, rock, voice, etc.) can be stored in the external
EPROM. Also, DRCE, MCR1, MCR2, and loudness contour are enabled and disabled by I2C.
When the TAS3004 device operates in the I2C master mode, it echoes changes to all of its functions to other I2C
addresses that are defined in its external EPROM. If no addresses are defined, it does not echo.
7.2
Power-Up/Power-Down Reset
7.2.1
Power-Up Sequence
An active low on terminal 6 (RESET) while MCLK is running, resets the internal microcontroller and DSP(s). RESET
synchronizes internally and can be asserted asynchronously or with the simple RC circuit in Figure 7–1. On reset,
SCL and SDA go to a high-impedance state. If the I2C address is set to 68h, approximately 400
s after RESET
returns to a 1, the device sends a one-byte query via I2C to look for an EPROM. If an EPROM is found, it becomes
an I2C master; otherwise, it becomes an I2C slave. When using address 68h in the slave mode, an external master
must wait until after the EPROM query or else bus contention and improper operation occurs.
I2C address x6Ah does not query the bus for an EPROM. The address for the EPROM is xA0h.
7.2.2
Reset
The TAS3004 device has an asynchronous reset terminal (RESET). This reset is synchronized with various clocks
used in this device to generate a synchronous internal reset. Upon reset, the TAS3004 device goes through the
following process:
Clears all the RAM memory content
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