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| 型号： | TAS3103IDCP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| 封装： | PLASTIC, HTSSOP-38 |
| 文件页数： | 133/148页 |
| 文件大小： | 1247K |
| 代理商： | TAS3103IDCP |
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If G is set to 0.0 and O is set to 0.0, loudness compensation is disabled. If G is set to 0.0 and O is set to 1.0, the
biquad-filtered audio is directly added to the volume level adjusted audio. Typically, LG and LO are used to derive
the desired loudness compensation function, G is used to turn loudness compensation on and off, and O is used to
enable and disable the biquad filter output when automatic volume tracking is turned off.
3.6.3
Time Alignment and Reverb Delay Processing
The TAS3103 provides delay line facilities at two locations in the TAS3103—in the 3D effects block (reverb delay),
and at the output mix block (delay). There are three reverb delay blocks, one for each monaural channel, and these
delay elements are typically used in implementing sound spatiality, a single mix reverberation, and other sound
effects. There are also three delay blocks, again one for each monaural channel, and these delay elements are
typically used for temporal channel alignment. The delay line facilities are implemented using a single 4K (4096) x
16-bit RAM resource. Each delay element implemented provides a one-sample delay (1/FS). The size of each delay
line can be programmed via the I2C bus, or set by the EEPROM download in the I2C master mode. The only restriction
is that the total delay line resources programmed cannot exceed the capacity of the 4K x 16-bit memory bank.
Figure 317 illustrates how delay line structures are established within the 4K RAM memory. As seen in Figure 317,
each delay line immediately begins where the previously implemented delay line leaves off. The actual placement
of the pointers is computed by the resident microprocessor; the user need only enter the delay value required.
However, the following four points must be kept in mind in programming the lengths of the delay lines.
1.
Each delay line of length L requires L+1 memory sample spaces
2.
Reverb delay lines require three memory words (48 bits) to implement a single delay element as the reverb
delay line operates in the 48-bit word structure of the digital audio processor (DAP).
3.
Delay lines require two memory words (32 bits) to implement a single delay element as the delay lines
operate on the mixer outputs after 32-bit truncation has been applied,
4.
There are five words of reserved memory space that must be preserved.
In Figure 317, the terms PCHx refer to delay line size assignments for the delay lines. The terms PRx see the delay
line size assignments for the reverb delay lines. For the example shown in Figure 317, the delay for channel 3 is
set to 0 and the reverberation delay for channel 2 is set to 0. From these zero-valued settings, it is seen that a delay
of 0 requires the use of one delay element. For the case of a delay of 0, the write transaction into the single delay
element takes place before the read from the single delay element, thereby achieving a net delay of 0.
In making the delay line length assignments, the only restriction is that the 4K memory resource not be exceeded.
Figure 318 illustrates the computations required to determine the maximum delay line length obtainable for five
cases:
1.
One reverb delay line
2.
One delay line
3.
Three equal length reverb delay lines but no delay lines
4.
Three equal length delay lines but no reverb delay lines
5.
Three equal length delay lines and three equal length reverb delay lines.
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| TAS3108DCP | 功能描述:音频 DSP 8-Channel Audio DSP RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
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| TAS3108DCPR | 功能描述:音频 DSP 8-Channel Audio DSP RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
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