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参数资料
| 型号： | TAS5086DBT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| 封装： | GREEN, TSSOP-38 |
| 文件页数： | 16/47页 |
| 文件大小： | 814K |
| 代理商： | TAS5086DBT |
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7-BitSlave Address
R/
W
8-BitRegister Address(N)
A
8-BitRegisterDataFor
Address(N)
Start
Stop
SDA
SCL
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
A
8-BitRegisterDataFor
Address(N)
A
T0035-01
SINGLE- AND MULTIPLE-BYTE TRANSFERS
SINGLE-BYTE WRITE
www.ti.com ................................................................................................................................................... SLES131C – FEBRUARY 2005 – REVISED JUNE 2008
Figure 22. Typical I2C Sequence
An unlimited number of bytes can be transmitted between start and stop conditions. When the last word
transfers, the master generates a stop condition to release the bus. A generic data transfer sequence is shown in
The 7-bit address for the TAS5086 is 0011 011.
The serial control interface supports both single-byte and multiple-byte read/write operations for status registers
and the general control registers associated with the PWM. However, for the DAP data processing registers, the
serial control interface supports only multiple-byte (4-byte) read/write operations.
During multiple-byte read operations, the TAS5086 responds with data, a byte at a time, starting at the
subaddress assigned, as long as the master device continues to respond with acknowledges. If a particular
subaddress does not contain 32 bits, the unused bits are read as logic 0.
During multiple-byte write operations, the TAS5086 compares the number of bytes transmitted to the number of
bytes that are required for each specific subaddress. If a write command is received for a biquad subaddress, the
TAS5086 expects to receive five 32-bit words. If fewer than five 32-bit data words have been received when a
stop command (or another start command) is received, the data received is discarded. Similarly, if a write
command is received for a mixer coefficient, the TAS5086 expects to receive one 32-bit word.
Supplying a subaddress for each subaddress transaction is referred to as random I2C addressing. The TAS5086
also supports sequential I2C addressing. For write transactions, if a subaddress is issued, followed by data for
that subaddress and the 15 subaddresses that follow, a sequential I2C write transaction has taken place, and the
data for all 16 subaddresses is successfully received by the TAS5086. For I2C sequential write transactions, the
subaddress then serves as the start address and the amount of data subsequently transmitted, before a stop or
start is transmitted, determines how many subaddresses are written. As was true for random addressing,
sequential addressing requires that a complete set of data be transmitted. If only a partial set of data is written to
the last subaddress, the data for the last subaddress is discarded. However, all other data written is accepted;
just the incomplete data is discarded.
As shown is Figure 23, a single-byte data write transfer begins with the master device transmitting a start
condition, followed by the I2C device address and the read/write bit. The read/write bit determines the direction of
the data transfer. For a write data transfer, the read/write bit must be set to 0. After receiving the correct I2C
device address and the read/write bit, the TAS5086 device responds with an acknowledge bit. Next, the master
transmits the address byte or bytes corresponding to the TAS5086 internal memory address being accessed.
After receiving the address byte, the TAS5086 again responds with an acknowledge bit. Next, the master device
transmits the data byte to be written to the memory address being accessed. After receiving the data byte, the
TAS5086 again responds with an acknowledge bit. Finally, the master device transmits a stop condition to
complete the single-byte data write transfer.
Copyright 2005–2008, Texas Instruments Incorporated
23
Product Folder Link(s): TAS5086
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相关代理商/技术参数 |
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| TAS5086DBT | 制造商:Texas Instruments 功能描述:IC DGTL AUDIO PWM 6CH 38-TSSOP 制造商:Texas Instruments 功能描述:IC, DGTL AUDIO PWM 6CH 38-TSSOP 制造商:Texas Instruments 功能描述:IC, DGTL AUDIO PWM 6CH 38-TSSOP; Audio Control Type:Digital; Supply Voltage Range:3V to 3.6V; Control Interface:I2C, Serial; Audio IC Case Style:TSSOP; No. of Pins:38; Operating Temperature Min:0C; Operating Temperature Max:70C; ;RoHS Compliant: Yes |
| TAS5086DBTG4 | 功能描述:音频 DSP 6 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| TAS5086DBTR | 功能描述:音频 DSP 6 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| TAS5086DBTRG4 | 功能描述:音频 DSP 6 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| TAS5100 | 制造商:TI 制造商全称:Texas Instruments 功能描述:TRUE DIGITAL AUDIO AMPLIFIER TAS5100A PWM POWER OUTPUT STAGE |
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