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参数资料
| 型号： | TAS5142DKDRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 音频／视频放大 |
| 英文描述： | 200 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO36 |
| 封装： | GREEN, PLASTIC, HSSOP-36 |
| 文件页数： | 15/31页 |
| 文件大小： | 942K |
| 代理商： | TAS5142DKDRG4 |
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Undervoltage Protection (UVP) and Power-On
DEVICE RESET
Overtemperature Protection
SLES126B – DECEMBER 2004 – REVISED MAY 2005
The demodulation-filter inductor must retain at
put into thermal shutdown, resulting in all half-bridge
least 5
H of inductance at twice the OC
outputs being set in the high-impedance (Hi-Z) state
threshold setting.
and SD being asserted low. OTE is latched in this
case. To clear the OTE latch, both RESET_AB and
Unfortunately,
most
inductors
have
decreasing
RESET_CD must be asserted. Thereafter, the device
inductance
with
increasing
temperature
and
resumes normal operation.
increasing current (saturation). To some degree, an
increase
in
temperature
naturally
occurs
when
operating at high output currents, due to core losses
Reset (POR)
and the dc resistance of the inductor's copper
The UVP and POR circuits of the TAS5142 fully
winding. A thorough analysis of inductor saturation
protect
the
device
in
any
power-up/down
and
and thermal properties is strongly recommended.
brownout situation. While powering up, the POR
Setting the OC threshold too low might cause issues
circuit resets the overload circuit (OLP) and ensures
such
as
lack
of
enough
output
power
and/or
that all circuits are fully operational when the
unexpected shutdowns due to too-sensitive overload
GVDD_X and VDD supply voltages reach 9.8 V
detection.
(typical).
Although
GVDD_X
and
VDD
are
independently monitored, a supply voltage drop
In general, it is recommended to follow closely the
below the UVP threshold on any VDD or GVDD_X
external component selection and PCB layout as
pin results in all half-bridge outputs immediately being
given in the Application section.
set in the high-impedance (Hi-Z) state and SD being
For
added
flexibility,
the
OC
threshold
is
asserted low. The device automatically resumes
programmable within a limited range using a single
operation when all supply voltages have increased
external resistor connected between the OC_ADJ pin
above the UVP threshold.
and AGND. (See the Electrical Characteristics section
of this data sheet for information on the correlation
between programming-resistor value and the OC
Two reset pins are provided for independent control
threshold.) It should be noted that a properly
of half-bridges A/B and C/D. When RESET_AB is
functioning
overcurrent
detector
assumes
the
asserted low, all four power-stage FETs in half--
presence of a properly designed demodulation filter at
bridges A and B are forced into a high-impedance
the power-stage output. Short-circuit protection is not
(Hi-Z) state. Likewise, asserting RESET_CD low
provided directly at the output pins of the power stage
forces all four power-stage FETs in half-bridges C
but
only
on
the
speaker
terminals
(after
the
and D into a high-impedance state. Thus, both reset
demodulation filter). It is required to follow certain
pins are well suited for hard-muting the power stage if
guidelines when selecting the OC threshold and an
needed.
appropriate demodulation inductor:
OC-Adjust Resistor Values
Max. Current Before OC Occurs
In BTL modes, to accommodate bootstrap charging
(k
)
(A)
prior to switching start, asserting the reset inputs low
22
9.4
enables weak pulldown of the half-bridge outputs. In
the SE mode, the weak pulldowns are not enabled,
27
8.6
and it is therefore recommended to ensure bootstrap
39
6.4
capacitor charging by providing a low pulse on the
47
6
PWM inputs when reset is asserted high.
69
4.7
Asserting either reset input low removes any fault
information to be signalled on the SD output, i.e., SD
is forced high.
The TAS5142 has a two-level temperature-protection
A rising-edge transition on either reset input allows
system that asserts an active-low warning signal
the device to resume operation after an overload
(OTW)
when
the
device
junction
temperature
fault.
exceeds 125
°C (nominal) and, if the device junction
temperature exceeds 155
°C (nominal), the device is
22
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