参数资料
型号: TAS5162DKD
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 400 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO36
封装: GREEN, PLASTIC, HSSOP-36
文件页数: 16/32页
文件大小: 974K
代理商: TAS5162DKD
www.ti.com
DEVICE RESET
Undervoltage Protection (UVP) and Power-On
SLES194D – OCTOBER 2006 – REVISED JULY 2007
system that asserts an active-low warning signal
(OTW)
when
the
device
junction
temperature
Two reset pins are provided for independent control
exceeds 125
°C (nominal) and, if the device junction
of half-bridges A/B and C/D. When RESET_AB is
temperature exceeds 155
°C (nominal), the device is
asserted low, all four power-stage FETs in half--
put into thermal shutdown, resulting in all half-bridge
bridges A and B are forced into a high-impedance
outputs being set in the high-impedance (Hi-Z) state
(Hi-Z) state. Likewise, asserting RESET_CD low
and SD being asserted low. OTE is latched in this
forces all four power-stage FETs in half-bridges C
case and RESET_AB and RESET_CD must be
and D into a high-impedance state. Thus, both reset
asserted low.
pins are well suited for hard-muting the power stage
if needed.
Reset (POR)
In BTL modes, to accommodate bootstrap charging
prior to switching start, asserting the reset inputs low
The UVP and POR circuits of the TAS5162 fully
enables weak pulldown of the half-bridge outputs. In
protect the device in any power-up/down and
the SE mode, the weak pulldowns are not enabled,
brownout situation. While powering up, the POR
and it is therefore recommended to ensure bootstrap
circuit resets the overload circuit (OLP) and ensures
capacitor charging by providing a low pulse on the
that all circuits are fully operational when the
PWM inputs when reset is asserted high.
GVDD_X and VDD supply voltages reach 9.8 V
(typical).
Although
GVDD_X
and
VDD
are
Asserting either reset input low removes any fault
independently monitored, a supply voltage drop
information to be signaled on the SD output, i.e., SD
below the UVP threshold on any VDD or GVDD_X
is forced high.
pin results in all half-bridge outputs immediately
A rising-edge transition on either reset input allows
being set in the high-impedance (Hi-Z) state and SD
the device to resume operation after an overload
being
asserted
low.
The
device
automatically
fault.
resumes operation when all supply voltage on the
bootstrap capacitors have increased above the UVP
threshold.
23
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