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参数资料
型号： TAS5162DKDRG4
厂商： TEXAS INSTRUMENTS INC
元件分类： 音频／视频放大
英文描述： 400 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO36
封装： GREEN, PLASTIC, HSSOP-36
文件页数： 13/32页
文件大小： 974K
代理商： TAS5162DKDRG4
www.ti.com
THEORY OF OPERATION
POWER SUPPLIES
SYSTEM POWER-UP/POWER-DOWN
Powering Up
Powering Down
TAS5162
SLES194D – OCTOBER 2006 – REVISED JULY 2007
Special attention should be paid to the power-stage
power supply; this includes component selection,
PCB placement, and routing. As indicated, each
To facilitate system design, the TAS5162 needs only
half-bridge has independent power-stage supply pins
a 12-V supply in addition to the (typical) 50-V
(PVDD_X). For optimal electrical performance, EMI
power-stage supply. An internal voltage regulator
compliance, and system reliability, it is important that
provides suitable voltage levels for the digital and
each PVDD_X pin is decoupled with a 100-nF
low-voltage analog circuitry. Additionally, all circuitry
ceramic capacitor placed as close as possible to
requiring a floating voltage supply, e.g., the high-side
each supply pin. It is recommended to follow the
gate drive, is accommodated by built-in bootstrap
PCB layout of the TAS5162 reference design. For
circuitry requiring only a few external capacitors.
additional
information
on
recommended
power
In
order
to
provide
outstanding
electrical
and
supply and required components, see the application
acoustical characteristics, the PWM signal path
diagrams given previously in this data sheet.
including gate drive and output stage is designed as
The 12-V supply should be from a low-noise,
identical, independent half-bridges. For this reason,
low-output-impedance voltage regulator. Likewise,
each half-bridge has separate gate drive supply
the 50-V power-stage supply is assumed to have low
(GVDD_X),
bootstrap
pins
(BST_X),
and
output impedance and low noise. The power-supply
power-stage supply pins (PVDD_X). Furthermore, an
sequence is not critical as facilitated by the internal
additional pin (VDD) is provided as supply for all
power-on-reset circuit. Moreover, the TAS5162 is
common circuits. Although supplied from the same
fully
protected
against
erroneous
power-stage
12-V source, it is highly recommended to separate
turn-on
due
to
parasitic
gate
charging.
Thus,
GVDD_A, GVDD_B, GVDD_C, GVDD_D, and VDD
voltage-supply ramp rates (dV/dt) are non-critical
on the printed-circuit board (PCB) by RC filters (see
within the specified range (see the Recommended
application diagram for details). These RC filters
Operating Conditions section of this data sheet).
provide the recommended high-frequency isolation.
Special attention should be paid to placing all
decoupling capacitors as close to their associated
pins as possible. In general, inductance between the
SEQUENCE
power supply pins and decoupling capacitors must
be avoided. (See reference board documentation for
additional information.)
The
TAS5162
does
not
require
a
power-up
For a properly functioning bootstrap circuit, a small
sequence. The outputs of the H-bridges remain in a
ceramic capacitor must be connected from each
highimpedance state until the gate-drive supply
bootstrap pin (BST_X) to the power-stage output pin
voltage (GVDD_X) and VDD voltage are above the
(OUT_X). When the power-stage output is low, the
undervoltage protection (UVP) voltage threshold (see
bootstrap capacitor is charged through an internal
the Electrical Characteristics section of this data
diode connected between the gate-drive power--
sheet). Although not specifically required, it is
supply pin (GVDD_X) and the bootstrap pin. When
recommended to hold RESET_AB and RESET_CD
the
power-stage
output
is
high,
the
bootstrap
in a low state while powering up the device. This
capacitor potential is shifted above the output
allows an internal circuit to charge the external
potential and thus provides a suitable voltage supply
bootstrap capacitors by enabling a weak pulldown of
for the high-side gate driver. In an application with
the half-bridge output.
PWM switching frequencies in the range from 352
When the TAS5162 is being used with TI PWM
kHz to 384 kHz, it is recommended to use 33-nF
modulators such as
the
TAS5508,
no
special
ceramic capacitors, size 0603 or 0805, for the
attention to the state of RESET_AB and RESET_CD
bootstrap supply. These 33-nF capacitors ensure
is required, provided that the chipset is configured as
sufficient energy storage, even during minimal PWM
recommended.
duty cycles, to keep the high-side power stage FET
(LDMOS) fully turned on during the remaining part of
the PWM cycle. In an application running at a
reduced switching frequency, generally 192 kHz, the
The TAS5162 does not require a power-down
bootstrap capacitor might need to be increased in
sequence. The device remains fully operational as
value.
long as the gate-drive supply (GVDD_X) voltage and
VDD voltage are above the undervoltage protection
(UVP)
voltage
threshold
(see
the
Electrical
20
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