参数资料
型号: TAS5342ADDV
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 100 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO44
封装: GREEN, PLASTIC, HTSSOP-44
文件页数: 2/27页
文件大小: 835K
代理商: TAS5342ADDV
ELECTRICAL CHARACTERISTICS
SLAS623 – NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com
PVDD_x = 31.5 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 25°C, fS = 384 kHz, unless otherwise specified.
TAS5342A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
Internal Voltage Regulator and Current Consumption
Voltage regulator, only used as a
VREG
VDD = 12 V
3
3.3
3.6
V
reference node
Operating, 50% duty cycle
7.2
17
IVDD
VDD supply current
mA
Idle, reset mode
5.54
11
50% duty cycle
8
16
IGVDD_X
Gate supply current per half-bridge
mA
Reset mode
1
1.8
50% duty cycle, with 10 uH and 470 nF output
16.3
25
mA
filter
IPVDD_X
Half-bridge idle current
Reset mode, no switching
465
558
A
Output Stage MOSFETs
Drain-to-source resistance, Low
RDSon,LS
TJ = 25°C, excludes metallization resistance,
80
89
m
Side
Drain-to-source resistance, High
RDSon,HS
TJ = 25°C, excludes metallization resistance,
80
89
m
Side
I/O Protection
Undervoltage protection limit,
Vuvp,G
9.5
V
GVDD_X
Vuvp,hyst
(1)
Undervoltage protection limit,
250
mV
GVDD_X
BSTuvpF
Puts device into RESET when BST
5.85
V
voltage falls below limit
BSTuvpR
Brings device out of RESET when
7
V
BST voltage rises above limit
OTW(1)
Overtemperature warning
115
125
135
°C
Temperature drop needed below
OTWHYST
(1)
OTW temp. for OTW to be inactive
25
°C
after the OTW event
OTE(1)
Overtemperature error threshold
145
155
165
°C
OTE-
OTE - OTW differential, temperature
30
°C
OTWdifferential
(1)
delta between OTW and OTE
OLPC
Overload protection counter
fS = 384 kHz
1.25
ms
Resistor—programmable, high-end,
IOC
Overcurrent limit protection
10.1
A
ROC = 27 k with 1 ms pulse
IOCT
Overcurrent response time
150
ns
tACTIVITY
Time for PWM activity detector to
Lack of transistion of any PWM input
13.2
S
DETECTOR
activite when no PWM is present
Connected when RESET is active to provide
Output pulldown current of each
IPD
bootstrap capacitor charge. Not used in SE
3
mA
half-bridge
mode.
Static Digital Specifications
VIH
High-level input voltage
2
V
PWM_A, PWM_B, PWM_C, PWM_D, M1,
M2, M3, RESET_AB, RESET_CD
VIL
Low-level input voltage
0.8
V
ILeakage
Input leakage current
100
A
OTW/SHUTDOWN (SD)
Internal pullup resistance, OTW to
RINT_PU
20
26
32
k
VREG, SD to VREG
Internal pullup resistor
3
3.3
3.6
VOH
High-level output voltage
V
External pullup of 4.7 k
to 5 V
4.5
5
(1)
Specified by design
10
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): TAS5342A
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