参数资料
型号: TAS5508BPAG
厂商: TEXAS INSTRUMENTS INC
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封装: GREEN, PLASTIC, TQFP-64
文件页数: 13/103页
文件大小: 1198K
代理商: TAS5508BPAG
2.2
TAS5508B Functional Description
2.2.1
Power Supply
2.2.2
Clock, PLL, and Serial Data Interface
2.2.2.1 Serial Audio Interface
TAS5508B
8-Channel Digital Audio PWM Processor
www.ti.com
SLES162C – DECEMBER 2005 – REVISED JULY 2009
Figure 1-1 shows the TAS5508B functional structure. The following sections describe the TAS5508B
functional blocks:
Power supply
Clock, PLL, and serial data interface
I2C serial-control interface
Device control
Digital audio processor (DAP)
The power-supply section contains supply regulators that provide analog and digital regulated power for
various sections of the TAS5508B. The analog supply supports the analog PLL, whereas digital supplies
support the digital PLL, the digital audio processor (DAP), the pulse-width modulator (PWM), and the
output control.
The TAS5508B is a clocked slave-only device that requires the use of an external 13.5-MHz crystal. It
accepts MCLK, SCLK, and LRCLK as inputs only.
The TAS5508B uses the external crystal to provide a time base for:
Continuous data and clock error detection and management
Automatic data-rate detection and configuration
Automatic MCLK-rate detection and configuration (automatic bank switching)
Supporting I2C operation/communication while MCLK is absent
The TAS5508B automatically handles clock errors, data-rate changes, and master-clock frequency
changes without requiring intervention from an external system controller. This feature significantly
reduces system complexity and design.
The TAS5508B operates as a slave-only/receive-only serial data interface in all modes. The TAS5508B
has four PCM serial data interfaces to permit eight channels of digital data to be received through the
SDIN1, SDIN2, SDIN3, and SDIN4 inputs. The serial audio data is in MSB-first, 2s-complement format.
The serial data input interface of the TAS5508B can be configured in right-justified, I2S, or left-justified
modes. The serial data interface format is specified using the I2C data-interface control register. The
supported formats and word lengths are shown in Table 2-1.
Description
17
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