参数资料
型号: TAS5704PAPR
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
封装: GREEN, PLASTIC, HTQFP-64
文件页数: 13/38页
文件大小: 735K
代理商: TAS5704PAPR
1/fS
(= 32 fS, 48 fS or 64 fS)
L-Channel
R-Channel
LRCK
SCLK
DATA
N1 N2
N3
N1
N2
MSB
0
LSB
1
2
0
MSB
N–2
N–1
LSB
1
2
N–3
SLOS563A – MARCH 2008 – REVISED AUGUST 2010
www.ti.com
DETAILED DESCRIPTION
POWER SUPPLY
The digital portion of the chip requires 3.3 V, and the power section operates from a variable range from 10 V to
26 V.
Clock, Auto Detection, and PLL
The TAS5704 DAP is a clock slave device. It accepts MCLK, SCLK, and LRCLK.
The TAS5704 checks to verify that SCLK is a specific value of 32-fs, 48- fs, or 64-fs. The DAP only supports a 1 ×
fs LRCLK. The timing relationship of these clocks to SDIN1 and SDIN2 is shown in subsequent sections. The
clock section uses MCLK or the internal oscillator clock (when MCLK is unstable or absent) to produce the
internal clock.
The DAP can auto-detect and set the internal clock control logic to the appropriate settings for the frequencies of
32 kHz, normal speed (44.1 or 48 kHz), double speed (88.2 kHz or 96 kHz), and quad speed (176.4 kHz or 192
kHz).
PWM SECTION
The DAP (digital audio processor) has four channels of high-performance digital PWM modulators that are
designed to drive bridge-tied output H-bridge configurations with AD or BD modulation and single-ended output
configurations with AD modulation.
The DAP uses noise-shaping and sophisticated error correction algorithms to achieve high power efficiency and
high-performance digital audio reproduction.
The PWM section accepts 24-bit PCM data from the DAP and outputs up to 4 PWM audio output channels.
The PWM section has individual channel dc blocking filters that are ALWAYS enabled. The filter cutoff frequency
is less than 1 Hz.
SERIAL DATA INTERFACE
Serial data is input on SDIN1 and SDIN2. The PWM outputs are derived from SDIN1 and SDIN2. The TAS5704
DAP accepts 32-, 44.1-, 48-, 88.2-, 96-, 176.4-, and 192-kHz serial data in 16-, 18-, 20-, or 24-bit data in
left-justified, right-justified, and I2S serial data formats. See Table 1 for format control settings.
SERIAL INTERFACE CONTROL AND TIMING
I2S Timing
I2S timing uses LRCLK to define when the data being transmitted is for the left channel and when it is for the
right channel. LRCLK is low for the left channel and high for the right channel. A system clock (SCLK) running at
32, 48, or 64 × fs is used to clock in the data. There is a delay of one bit clock from the time the LRCLK signal
changes state to the first bit of data on the data lines. The data is written MSB first and is valid on the rising edge
of the bit clock. The DAP masks unused trailing data bit positions.
Figure 26. I2S Format
20
Copyright 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5704
相关PDF资料
PDF描述
TAS5704PAP 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
TAS5704PAPG4 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
TAS5705PAPG4 20 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
TAS5705PAPRG4 20 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
TAS5705PAPR 20 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
相关代理商/技术参数
参数描述
TAS5704PAPRG4 功能描述:音频放大器 20W stereo Dig Aud Pwr Amp RoHS:否 制造商:STMicroelectronics 产品:General Purpose Audio Amplifiers 输出类型:Digital 输出功率: THD + 噪声: 工作电源电压:3.3 V 电源电流: 最大功率耗散: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel
TAS5705 制造商:TI 制造商全称:Texas Instruments 功能描述:20-W STEREO DIGITAL AUDIO POWER AMPLIFIER WITH EQ AND DRC
TAS5705EVM2 功能描述:音频 IC 开发工具 TAS5705EVM2 Eval Mod RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V
TAS5705PAP 功能描述:音频放大器 20W stereo Dig Audio Pwr Amp RoHS:否 制造商:STMicroelectronics 产品:General Purpose Audio Amplifiers 输出类型:Digital 输出功率: THD + 噪声: 工作电源电压:3.3 V 电源电流: 最大功率耗散: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel
TAS5705PAPG4 功能描述:音频放大器 20W stereo Dig Aud Pwr Amp RoHS:否 制造商:STMicroelectronics 产品:General Purpose Audio Amplifiers 输出类型:Digital 输出功率: THD + 噪声: 工作电源电压:3.3 V 电源电流: 最大功率耗散: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel