参数资料
型号: TB1308FG
元件分类: 信号分离
英文描述: SYNC SEPARATOR IC, PQFP48
封装: 10 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-48
文件页数: 17/33页
文件大小: 659K
代理商: TB1308FG
TB1305FG, TB1308FG
2006-07-03
24
Characteristic
Symbol
Test Conditions
Min
Typ.
Max
Unit
BANDWIDTH = max TdhfHmax
22
27
32
BANDWIDTH = cnt
TdhfHcnt
29
34
39
I/O delay time 5
BANDWIDTH = min
TdhfHmin
FILPASS = 1, GAIN = 0, f0 SW = 0,
fc HALF = 1, 1 MHz, NOTE 7
45
50
55
ns
GAIN = 0
Tddg0
-10
0
10
Differential 1 of
delay time among
3 outputs
GAIN = 1
Tddg6
FILPASS = 0, 1 MHz, NOTE 7
-10
0
10
ns
BANDWIDTH = max TddHmax
-10
0
10
BANDWIDTH = cnt
TddHcnt
-10
0
10
Differential 2 of
delay time among
3 outputs
BANDWIDTH = min
TddHmin
FILPASS = 1, f0 SW = 1, 1 MHz,
NOTE 7
-10
0
10
ns
BANDWIDTH = max TddHmax
0
10
20
BANDWIDTH = cnt
TddHcnt
10
20
30
Differential 3 of
delay time
between Y and
Cb/Cr outputs
BANDWIDTH = min
TddHmin
FILPASS = 1, f0 SW = 0,
fc HALF = 1, 1 MHz, NOTE 7
35
45
55
ns
BANDWIDTH = max TddHmax
-10
0
10
BANDWIDTH = cnt
TddHcnt
-10
0
10
Differential 4 of
delay time
between Cb and
Cr outputs
BANDWIDTH = min
TddHmin
FILPASS = 1, f0 SW = 0,
fc HALF = 1, 1 MHz, NOTE 7
-10
0
10
ns
Mute mode attenuation
Gmute
30 MHz sin wave input, NOTE 7
-50
dB
Crosstalk among inputs
Gcrs
30 MHz sin wave input, NOTE 7
-50
dB
NOTE 7: This parameter is not tested during production and is provided only as information to assist the design of applications.
Synchronization Block (Test condition: A-SYNC = 1 (ON))
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
VsepL1
HV-SEP = 0, 286 mVp-p sync,
NOTE 7
24
28
32
525/60i
VsepH1
HV-SEP = 1, 286 mVp-p sync,
NOTE 7
27
31
35
%
VsepL2
HV-SEP = 0, 0.3 Vp-p sync, NOTE 7
30
34
38
1125/60i
VsepH2
HV-SEP = 1, 0.3 Vp-p sync, NOTE 7
40
44
48
%
VsepL3
HV-SEP = 0, VGA-SEP = 1, 0.3 Vp-p
sync, NOTE 7
14
18
22
H/V-sync separation level
SVGA/60
VsepH3
HV-SEP = 1, VGA-SEP = 1, 0.3 Vp-p
sync, NOTE 7
16
20
24
%
Threshold amplitude for HD input
VthHD
SYNC SW = 100
0.8
Vp-p
Threshold amplitude for VD input
VthVDn
SYNC SW = 100
0.9
Vp-p
VhdH
High level
3.2
3.4
3.5
HD-OUT voltage
VhdL
Low level
0.1
0.4
V
Thdw0
HD WIDTH = 0
1.55
1.65
1.75
HD-OUT width
Thdw1
HD WIDTH = 1
0.55
0.65
0.75
us
H sync-in to HD-out
Thdp1
SYNC-SW = 000, 1125/60p input
130
150
170
ns
HD-OUT phase
HD-in to HD-out
Thdp2
SYNC-SW = 100, NOTE 7
23
28
32
ns
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