参数资料
型号: TB1311AFG
元件分类: 信号分离
英文描述: SYNC SEPARATOR IC, PQFP80
封装: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件页数: 9/46页
文件大小: 948K
代理商: TB1311AFG
TB1311AFG
2006-05-29
17
Read Mode
Register Name
Function
POR
Power On Reset
0: Normal
1: Register preset
After power on, 1 is returned at first read. 0 is returned at second and subsequent reads.
H FM2
Horizontal format detection 2
0: Known
1: Unknown
Detects whether an input is in one of the defined formats or not. This is based on H FORMAT data.
V FM2
Vertical format detection 2
0: Known
1: Unknown
Detects whether an input is in one of the defined formats or not. This is based on V FORMAT data.
H IN
Input detection to horizontal syncs
0: No input
1: Signal detected
V IN
Input detection to vertical syncs
0: No input
1: Signal detected
V-SYNC-W
V-SYNC width detection
0: Wide
1: Narrow
Detects V-SYNC width for detecting 1250i format.
Under A-SYNC = 1 (ON), V-SYNC-W shows 1 when VD width from VD-IN pin is narrower than approx
69 s, or when V-SYNC width from SYNC-IN pin is narrower than approx 54 s.
HD-POL
Polarity detection to HD-IN
0: Positive
1: Negative
Detects the width from the HD-IN pin to determine whether it is negative or not.
When the High level of the input is wider than approx 13.5 us, HD-POL shows 1.
VD-POL
Polarity detection to VD-IN
0: Positive
1: Negative
Detects the width from the VD-IN pin to determine whether it is negative or not.
When the High level of the input is wider than approx 4.5 ms, VD-POL shows 1.
H FORMAT
Horizontal format detection
0000: 15.625/15.75 kHz 0001: 28.125 kHz
0010: 31.25/31.5 kHz
0011: 33.75 kHz
0100: 37.5/37.9 kHz
0101: 45/48 kHz
0110: 56.25 kHz
0111: 64/67.5 kHz
1000: 75 kHz
1001 to 1111: Undefined
Detects a horizontal format (horizontal frequency).
V FORMAT
Vertical format detection
000: 50 Hz
001: 60 Hz
010: 48 Hz
011: 30 Hz
100: 25 Hz
101: 24 Hz
110 to 111: Undefined
Detects a vertical format (horizontal frequency) according to V FREQ DET data.
FB DET1(2)
Voltage detection of FB pin for SCART connector
0: Not always high
1: Always high
Detects the voltage of FB-IN pin, selected by FB1(2) OUT (to pin 9 (22)) to determine whether the
voltage is always high or not.
SIG DET
No-input detection.
0: No input
1: A signal detected
The signal to the no-input detection circuit is selected by SIG SW. Refer to the relevant functions for H
COUNT MAX, H COUNT MIN, SIG DET N, SIG RESET N, SIG RESET, SIG DET IMPE and SIG DET
LVL.
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