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参数资料
| 型号： | TC1026CEUA |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封装： | MSOP-8 |
| 文件页数： | 6/13页 |
| 文件大小： | 84K |
| 代理商： | TC1026CEUA |
TC1026
Linear Building Block – Low-Power
Comparator with Op Amp and
Voltage Reference
2
TC1026-2 1/04/01
2001 Microchip Technology Inc. DS21337A
* Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ........................................................... 6.0V
Package Power Dissipation:
8-Pin PDIP (Narrow) ............................ 730 mW
8-Pin SOIC ........................................... 470 mW
8-Pin MSOP (Narrow) .......................... 320 mW
Voltage on Any Pin: (With Respect to Supplies)
...................................... (VSS – 0.3V) to (VDD +0.3V)
Operating Temperature Range:
............................................... – 40
°C to + 85°C
Storage Temperature Range ................ – 55
°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +260
°C
ELECTRICAL CHARACTERISTICS: TA = –40° to +85°C,and VDD = 1.8V to 5.5V, unless otherwise specified.
Typical values apply at 25
°C and VDD=3.0V.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
VDD
Supply Voltage
1.8
—
5.5
V
IQ
Supply Current
All outputs unloaded
—
12
18
A
Op Amp
AVOL
Large Signal Voltage Gain
RL = 10 K, VDD = 5V
—
100
—
V/mV
VICMR
Common Mode Input Voltage Range
VSS – 0.2
—
VDD +0.2
V
VOS
Input Offset Voltage
VDD = 3V, VCM = 1.5V, TA = 25°C,
±100
±500
V
TA = –40°C to 85°C
±0.3
±1.5
mV
IB
Input Bias Current
TA = 25°C, VCM = VDD to VSS
–100
50
100
pA
VOS (DRIFT)
Average Input Offset Voltage Drift
VDD = 3V, VCM = 1.5V
—
4
—
V/°C
GBWP
Gain-Bandwidth Product
VDD = 1.8V to 5.5V;
VO = VDD to VSS
—
90
—
KHz
SR
Slew Rate
CL = 100pF
RL = 1M to GND
Gain = 1
VIN = VSS to VDD
—
35
—
mV/
sec
VOUT
Output Signal Swing
RL = 10 K
VSS+
—
VDD–
V
0.05
CMRR
Common Mode Rejection Ratio
TA = 25°C, VDD = 5V
66
——
dB
VCM = VDD to VSS
PSRR
Power Supply Rejection Ratio
TA = 25°C,VCM = VSS
80
——
dB
VDD = 1.8 to 5V
ISRC
Output Source Current
VIN+ = VDD, VIN– = VSS
3
——
mA
Output Shorted to VSS
VDD = 1.8V, Gain = 1
ISINK
Output Sink Current
VIN+ = VSS, VIN– = VDD,
Output Shorted to VDD
4
——
mA
VDD = 1.8V, Gain = 1
en
Input Noise Voltage
0.1 Hz to 10 Hz
—
10
—
Vpp
Input Noise Density
1KHz
—
125
—
nV/√Hz
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