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| 型号： | TC1055-4.0VCT |
| 厂商： | Microchip Technology Inc. |
| 元件分类： | 基准电压源/电流源 |
| 英文描述： | 50mA, 100mA and 150mA CMOS LDOs with Shutdown and ERROR Output |
| 中文描述： | 为50mA，100mA的电流为150mA的CMOS关机和错误LDO的输出 |
| 文件页数： | 7/18页 |
| 文件大小： | 501K |
| 代理商： | TC1055-4.0VCT |
2002 Microchip Technology Inc.
DS21350B-page 7
TC1054/TC1055/TC1186
4.0
THERMAL CONSIDERATIONS
4.1
Thermal Shutdown
Integrated
regulator off when die temperature exceeds 160°C.
The regulator remains off until the die temperature
drops to approximately 150°C.
thermal
protection
circuitry
shuts
the
4.2
Power Dissipation
The amount of power the regulator dissipates is
primarily a function of input and output voltage, and
output current. The following equation is used to
calculate worst case actual power dissipation:
EQUATION 4-1:
The
(Equation 4-2) is a function of the maximum ambient
temperature (T
A
MAX
), the maximum allowable die
temperature (T
J
MAX
) and the thermal resistance from
junction-to-air (
θ
JA
). The 5-Pin SOT-23A package has
a
θ
JA
of approximately 220°C/Watt.
maximum
allowable
power
dissipation
EQUATION 4-2:
Equation 4-1
Equation 4-2 to ensure regulator thermal operation is
within limits. For example:
can
be
used
in
conjunction
with
Given:
V
IN
MAX
V
OUT
MIN
I
LOAD
MAX
= 40mA
T
J
MAX
T
A
MAX
Find: 1. Actual power dissipation
2. Maximum allowable dissipation
= 3.0V ±5%
= 2.7V – 2.5%
= 125°C
= 55°C
Actual power dissipation:
P
D
≈
(V
IN
MAX
– V
OUT
MIN
)I
LOAD
MAX
= [(3.0 x 1.05) – (2.7 x .975)]40 x 10
–3
= 20.7mW
Maximum allowable power dissipation:
In this example, the TC1054 dissipates a maximum of
20.7mW; below the allowable limit of 318mW. In a
similar manner, Equation 4-1 and Equation 4-2 can be
used to calculate maximum current and/or input
voltage limits.
4.3
Layout Considerations
The primary path of heat conduction out of the package
is via the package leads. Therefore, layouts having a
ground plane, wide traces at the pads, and wide power
supply bus lines combine to lower
θ
JA
and therefore,
increase the maximum allowable power dissipation
limit.
Where:
P
D
≈
(V
IN
MAX
– V
OUT
MIN
)I
LOAD
MAX
P
D
V
IN
MAX
V
OUT
MIN
I
LOAD
MAX
= Worst case actual power dissipation
= Maximum voltage on V
IN
= Minimum regulator output voltage
= Maximum output (load) current
P
D
MAX
= (T
J
MAX
– T
A
MAX
)
θ
JA
Where all terms are previously defined.
P
D
MAX
= (T
J
MAX
– T
A
MAX
)
θ
JA
= (125 – 55)
220
= 318mW
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