参数资料
型号: TC1271TERCTR
厂商: Microchip Technology
文件页数: 6/14页
文件大小: 0K
描述: IC RESET MONITOR 3.08V SOT143-4
标准包装: 3,000
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 140 ms
电压 - 阀值: 3.08V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: TO-253-4,TO-253AA
供应商设备封装: SOT-143
包装: 带卷 (TR)
TC1270/TC1271
4.0
4.1
APPLICATIONS INFORMATION
V CC Transient Rejection
be connected from RESET to ground to discharge stray
capacitances and hold the output low ( Figure 4-2 ). This
resistor value, though not critical, should be chosen
such that it does not appreciably load RESET under
The TC1270/TC1271 provides accurate V CC
monitoring and Reset timing during power-up,
power-down, and brownout/sag conditions, and rejects
negative-going transients (glitches) on the power
supply line. Figure 4-3 shows the maximum transient
duration vs. maximum negative excursion (overdrive)
for glitch rejection. Any combination of duration and
overdrive that lays under the curve will not generate a
Reset signal. Combinations above the curve are
detected as a brown-out or power-down. Transient
immunity can be improved by adding a capacitor in
close proximity to the V CC pin of the TC1270/TC1271.
normal operation (100 k Ω will be suitable for most
applications). Similarly, a pull-up resistor to V CC is
required for the TC1271 to ensure a valid high RESET
for V CC below 1.1V.
V CC
V CC
TC1270
RESET
V CC
R1
V TH
Overdrive
GND
100k
Duration
FIGURE 4-2:
V CC = 0V.
Ensuring RESET Valid to
400
T A = +25°C
4.3
Processors With Bidirectional
I/O Pins
320
240
160
Some microprocessors (such as Motorola’s 68HC11)
have bidirectional Reset pins. Depending on the
current drive capability of the processor pin, an indeter-
minate logic level may result if there is a logic conflict.
This can be avoided by adding a 4.7 k Ω resistor in
series with the output of the TC1270/TC1271
80
0
TC127LMJ
TC127xR/S/T
( Figure 4-3 ). If there are other components in the sys-
tem which require a Reset signal, they should be buff-
ered so as not to load the Reset line. If the other
components are required to follow the Reset I/O of the
microprocessor, the buffer should be connected as
1
10
100
1000
shown with the solid line.
RESET COMPARATOR OVERDRIVE,
V TH - V CC (mV)
Buffered RESET
FIGURE 4-1:
Maximum Transient
Buffer
To Other System
Components
Duration vs. Overdrive for Glitch Rejection at
+25°C.
V CC
V CC
V CC
4.2
Reset Signal Integrity During
Power-Down
TC1270
RESET
4.7k
μ P
RESET
The TC1270 RESET output is valid to V CC = 1.0V.
Below this voltage the output becomes an “open circuit”
and does not sink current. This means CMOS logic
inputs to the microprocessor will be floating at an
undetermined voltage. Most digital systems are
completely shut down well above this voltage.
However, in situations where RESET must be
maintained valid to V CC = 0V, a pull-down resistor must
DS21381D-page 6
GND
FIGURE 4-3:
Reset I/O.
GND
Interfacing to Bidirectional
? 2007 Microchip Technology Inc.
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