参数资料
型号: TC14433EJG
元件分类: ADC
英文描述: 1-CH 3-BIT DUAL-SLOPE ADC, SERIAL ACCESS, CDIP24
封装: CERAMIC, DIP-24
文件页数: 17/20页
文件大小: 356K
代理商: TC14433EJG
TC14433/A
DS21394C-page 6
2006 Microchip Technology Inc.
15
18
OR
Overrange pin. Normally this pin is set high. When VX exceeds VREF the OR
is low.
16
19
DS4
Digit select pin. The digit select output goes high when the respective digit is
selected. The MSD (1/2 digit turns on immediately after an EOC pulse).
17
20
DS3
The remaining digits turn on in sequence from MSD to LSD.
18
21
DS2
To ensure that the BCD data has settled, an inter digit blanking time of two
clock periods is included.
19
23
DS1
Clock frequency divided by 80 equals multiplex rate. For example, a system
clock of 60 kHz gives a multiplex rate of 0.8 kHz.
20
24
Q0
See Figure for digit select timing diagram.
21
25
Q1
BCD data output pin. Multiplexed BCD outputs contain three full digits of
information during digit select DS2, DS3, DS4.
22
26
Q2
During DS1, the 1/2 digit, overrange, underrange and polarity information
is available.
23
27
Q3
Refer to the Truth Table 5-1.
24
28
VDD
Positive power supply. This is the most positive power supply pin.
1
NC
Not Used.
8
NC
Not Used.
15
NC
Not Used.
22
NC
Not Used.
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin No.
(24-Pin PDIP)
(24-Pin CERDIP)
(24-Pin SOIC)
Pin No.
(28-Pin
PLCC)
Symbol
Description
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