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参数资料
| 型号： | TC2683EUATR |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHED CAPACITOR CONVERTER, 45.5 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封装： | MSOP-8 |
| 文件页数： | 6/10页 |
| 文件大小： | 220K |
| 代理商： | TC2683EUATR |
2005 Microchip Technology Inc.
DS21548C-page 5
TC2682/TC2683/TC2684
4.0
APPLICATIONS INFORMATION
4.1
Output Voltage Considerations
The
TC2682/TC2683/TC2684
perform
inverting
voltage conversions but do not provide any type of
regulation. The output voltage will droop in a linear
manner with respect to the output load current. The
value
of
the
equivalent
output
resistance
is
approximately 120
Ω nominal at +25°C and VIN = +5V.
In this particular case, the output is approximately -10V
at very light loads and will droop according to the
equation below:
VDROOP = IOUT x ROUT
4.2
Capacitor Selection
In order to maintain the lowest output resistance and
output ripple voltage, it is recommended that low ESR
capacitors be used. Additionally, larger values of C1
and C2 will lower the output resistance and larger
values of COUT will reduce output ripple.
Note:
For proper charge pump operation, C1
must have a voltage rating greater than or
equal to VIN, while C2 and COUT must have
a voltage rating greater than or equal to
2VIN.
Table 4-1 shows various values of C1/C2 and the
corresponding output resistance values for VIN = 5V
@ +25°C.
Table 4-2 shows the output voltage ripple for various
values of COUT (again assuming VIN = 5V @ +25°C).
The VRIPPLE values assume a 1mA output load current
and a 0.1
Ω ESRCOUT.
TABLE 4-1:
OUTPUT RESISTANCE
VS. C1/C2 (ESR = 0.1
Ω)
TABLE 4-2:
OUTPUT VOLTAGE RIPPLE
VS. COUT2 (ESR = 0.1Ω)
IOUT = 1mA
4.3
Input Supply Bypassing
The VIN input should be capacitively bypassed to
reduce AC impedance and minimize noise effects due
to the switching internal to the device. It is recom-
mended that a large value capacitor (at least equal to
C1) be connected from VIN to GND for optimal circuit
performance.
4.4
Inverting Voltage Doubler
The most common application for the TC2682/TC2683/
TC2684 devices is the inverting voltage doubler
(Figure 4-1). This application uses three external
capacitors: C1, C2 and COUT.
Note:
A
power
supply
bypass
capacitor
is
recommended.
The output is equal to -2VIN plus any voltage drops due
capacitor selection guidelines.
FIGURE 4-1:
DUAL VOLTAGE
INVERTER TEST CIRCUIT
4.5
Layout Considerations
As with any switching power supply circuit, good layout
practice is recommended. Mount components as close
together as possible to minimize stray inductance and
capacitance. Also use a large ground plane to minimize
noise leakage into other circuitry.
C1, C2
(
μF)
TC2682
ROUT(Ω)
TC2683
ROUT(Ω)
TC2684
ROUT(Ω)
0.33
633
184
120
1
262
120
102
3.3
120
95
84
COUT
(
μF)
TC2682
VRIPPLE
(mV)
TC2683
VRIPPLE
(mV)
TC2684
VRIPPLE
(mV)
0.33
192
60
27
163
21
16
3.3
17
8
7
C1
C2
VIN
CIN
VOUT
RL
VIN
COUT
TC2682
TC2683
TC2684
C1–
C2–
2
1
7
6
4
5
3
C1+
C2+
GND
+
Device
CIN
C1
C2
COUT
TC2682
3.3
μF
3.3
μF
3.3
μF
3.3
μF
TC2683
1
μF
1
μF
1
μF
1
μF
TC2684
0.33
μF
0.33
μF
0.33
μF
0.33
μF
VOUT
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