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参数资料
| 型号： | TC3405VQRTR |
| 元件分类： | ADC |
| 英文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封装： | QSOP-16 |
| 文件页数： | 12/16页 |
| 文件大小： | 453K |
| 代理商： | TC3405VQRTR |
2002 Microchip Technology Inc.
DS21414B-page 5
TC3405
2.0
PIN DESCRIPTIONS
Thedescriptionsof the pins arelistedinTable2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin No.
(16-Pin PDIP)
(16-Pin QSOP)
Symbol
Description
1
IN1+
Analog Input. This is the positive terminal of a true differential input consisting of IN1+ and IN1-.
VIN1 = (IN1+ – IN-). See Section 1.0, Electrical Characteristics.
2
IN1-
Analog Input. This is the negative terminal of a true differential input consisting of IN1+ and IN1-.
VIN1 = (IN+ – IN-) IN1- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics.
3
IN2
Analog Input. This is the positive terminal of a true differential input with the negative input tied
internally to GND. See Section 1.0, Electrical Characteristics.
4
IN3
Analog Input. This is the positive terminal of a true differential input with the negative input tied
internally to GND. See Section 1.0, Electrical Characteristics.
5
IN4
Analog Input. This is the positive terminal of a true differential input with the negative input tied
internally to GND. See Section 1.0, Electrical Characteristics.
6VTH
Analog Input. This is the positive input to the internal comparator used to monitor the voltage supply.
The negative input is tied to an internal reference. When VTH falls below the internal reference, the
reset generator drives RESET low. See Section 1.0, Electrical Characteristics.
7REFIN
Analog Input. The converter’s reference voltage is the differential between this pin and ground times
two. It maybetieddirectly to REFOUT or scaled using a resistor divider. Any user supplied
reference voltage less than 1.25 may be used in place of REFOUT.
8
GND
Ground Terminal.
9REFOUT Analog Output. The internal reference connects to this pin. It may be scaled externally, and tied to the
REFIN input to provide the converter’s reference voltage. Care must be taken in connecting external
circuitry to this pin. This pin is in a high impedance state during Sleep mode.
10
SDAT
Digital Output (push-pull). This is the microPort serial data output. SDAT is driven low while the
TC3405 is converting data, effectively providing a “busy” signal. After the conversion is complete,
every high to low transition on the SCLK pin puts a bit from the resulting data word on the SDAT pin
(from MSB to LSB).
11
ENABLE Digital Input. When this input control is pulled low, the part is internally restarted. That is, any data
conversion or data read sequence is cleared and the part goes into Sleep mode. When ENABLE
returns high, the part resumes normal operation.
12
RESET
Digital Output (open drain). This is the output of the VDD monitor reset generator. RESET is driven low
when a Power-on Reset or Brown-out condition is detected.
See Section 1.0, AC Electrical Characteristics.
13
A1
Digital Input. Controls analog multiplexer in conjunction with A0 to select one of the four input
channels. This address is latched at the falling edge of the SCLK, which starts an A/D conversion.
A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.
14
A0
Digital Input. Controls analog multiplexer in conjunction with A1 to select one of the four input
channels. This address is latched at the falling edge of the SCLK, which starts an A/D conversion. A1,
A0 =00=Input 1; 01= Input 2; 10=Input 3; 11=Input 4.
15
SCLK
Digital Input. This is the microPort serial clock input. The TC3405 comes out of Sleep mode and a
conversion cycle begins when this pin is driven low. After the conversion starts, each additional
falling edge (up to six) detected on SCLK for t4 seconds, reduces the A/D resolution by one bit. When
the conversion is complete, the data word can be shifted out on the SDAT pin by clocking the SCLK
pin.
16
VDD
Power Supply Input.
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