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参数资料
| 型号： | TC43EPR |
| 厂商： | TelCom Semiconductor, Inc. |
| 英文描述： | LINEAR BUILDING BLOCK - VOLTAGE REFERENCE, DUAL OP AMP, DUAL COMPARATOR WITH SHUTDOWN MODE |
| 中文描述： | 线性积木-电压基准，双运算放大器，双通道比较器关断模式 |
| 文件页数： | 4/6页 |
| 文件大小： | 75K |
| 代理商： | TC43EPR |
TC43
LINEAR BUILDING BLOCK –
VOLTAGE REFERENCE, DUAL OP AMP,
DUAL COMPARATOR WITH SHUTDOWN MODE
4
PRELIMINARY INFORMATION
Voltage Reference
A 4% tolerance, internally biased, 1.20V bandgap volt-
age reference is included in the TC43. It has a push-pull
output capable of sourcing 5mA or sinking 200
μ
A. The
voltage reference remains fully enabled during shutdown.
Shutdown Input
SHDN at V
IL
disables both op amps and one compara-
tor. The SHDN input cannot be allowed to float; when not
used, connect to V
DD
.
TYPICAL APPLICATIONS
The TC43 lends itself to a wide variety of applications,
particularly in battery-powered systems. It typically finds
application in power management, processor supervisory,
and interface circuitry.
Wake-up Timer
Many microcontrollers have a low power “sleep” mode
that significantly reduces their supply current. Typically, the
microcontroller is placed in this mode via a software instruc-
tion, and returns to a fully enabled state upon reception of
an external signal (“wake-up”). The wake-up signal is usu-
ally supplied by a hardware timer. Most system applications
demand that this timer have a long duration (typically
seconds or minutes), and consume as little supply current
as possible.
The circuit shown in Figure 1 is a wake-up timer made
from comparator CMPTR2. (CMPTR2 is used because the
wake-up timer must operate when SHDN is active.) Capaci-
tor C1 charges through R1 until a voltage equal to
V
DD
/2 is reached, at which point the WAKE is driven active.
Upon wake-up, the microcontroller resets the timer by
forcing a logic low on a dedicated, open drain I/O port pin.
This discharges C1 through R4 (the value of R4 is chosen to
limit maximum current sunk by the I/O port pin). With a 3V
supply, the circuit as shown consumes typically 8
μ
A and
furnishes a nominal timer duration of 25 seconds.
Precision Battery Monitor
Figure 2 is a precision battery low/battery dead monitor-
ing circuit. Typically, the battery low output warns the user
that a battery dead condition is eminent. Battery dead
typically initiates a forced shutdown to prevent operation at
low internal supply voltages (which can cause unstable
system operation).
The circuit of Figure 2 uses a single TC43 (one Op Amp
unused) and only 7 external resistors. AMP 1 is a simple
buffer while CMPTR1 and CMPTR2 provide precision volt-
age detection using Vr as a reference. Resistors R2 and R4
set the detection threshold for BATT LOW while resistors
R1 and R7 set the detection threshold for BATT FAIL. The
component values shown assert BATT LOW at 2.2V (typi-
cal) and BATT FAIL at 2.0V (typical). Total current con-
sumed by this circuit is typically 22
μ
A at 3V.
DUAL LDO with Shutdown
Figure 3 shows a portion of a TC43 configured as a dual
low drop regulator with shutdown. AMP1 and AMP2 are
independent error amplifiers that use Vr as a reference.
Resistors RA and RB set the feedback around the amplifier
and therefore determine the output voltage setting (please
see equation in the figure). RA and RB can have large ohmic
values (i.e. 100’s of K
) to minimize supply current.
Using the 2N2222 output transistors as shown, these
regulators exhibit low dropout operation. For example, with
V
OUT
= 3.0V, the typical drop out voltage is only 50mV at an
output current of 50mA. The unused comparators can be
used in conjunction with this circuit as power-on reset or low
voltage detectors for a complete LDO solution at a very low
installed cost.
EVALUATION KIT
The TC43EV consists of a four inch by six inch pre-wired
application circuit board. Pre-configured circuits include a
pulse width modulator, wake-up timer, function generator,
and others. On-board current meter terminals, voltage regu-
lator and a user-prototyping area speed circuit develop-
ment. Please contact your local TelCom Semiconductor
representative for more information.
Figure 1. Wake-Up Timer
WAKE-UP
R1
5M
R4
R2, 1M
R3, 1M
C1
10
μ
F
V
DD
+
–
I/O*
*OPEN DRAIN PORT PIN
MICROCONTROLLER
CMPTR2
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