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| 型号： | TC520ACOE |
| 厂商： | Microchip Technology |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | IC SERIAL INTERFACE ADT 16SOIC |
| 标准包装： | 47 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 673 (CN2011-ZH PDF) |
2002 Microchip Technology Inc.
DS21431B-page 7
TC520A
4.0
TYPICAL APPLICATIONS
4.1
TC500 Series A/D Converter
Component Selection
The TC500/TC500A/TC510/TC514 data sheet details
the equations necessary to calculate values for integra-
tion resistor (RINT) and capacitor (CINT), auto zero
(CAZ) and reference capacitors (CREF) and voltage ref-
erence (VREF). All equations apply when using the
TC520A, except Integration time (TINT) and Auto zero
time (TAZ), which are functions of the SYSCLK period
(timebase frequency and LOAD VALUE). Microchip
offers a ready-to-use TC5XX A/D converter design tool.
The TC500 Design Spreadsheet is an Excel-based
spreadsheet that calculates values for all components
as well as the TC520A LOAD VALUE. It also calculates
overall converter performance such as noise rejection,
converter speed, etc.
4.2
TC520A Initialization
Initialization of the TC520A consists of:
1.
Power-On RESET of the TC500/TC520A (forc-
ing the TC520A into an AZ phase).
2.
Initializing the TC520A LOAD VALUE.
4.3
Power-On RESET
The TC520A powers up with A,B = 00 (IZ Phase),
awaiting a high logic state on CMPTR, which must be
initiated by forcing the TC520A into the AZ phase. This
can be accomplished in one of two ways:
1.
External hardware (processor or logic) can
momentarily pull LOAD or CE low for a minimum
of 100msec (TAZI)or;
2.
A .01
F RESET capacitor can be connected
from CE to VCC to generate a power-on pulse on
CE.
4.4
LOAD VALUE Initialization
The LOAD VALUE is thepreset value (highbyteof the
SYSCLK timing counter) which determines the number
of counts allocated to the AZ and INT phases of
conversion. This value can be calculated using either
the TC520A spreadsheet within the TC500 Design
Spreadsheet software or can be setup as shown in the
following sections.
4.4.1
SELECT VREF,TDEINT
Choose the TC5XX A/D converter reference voltage
(VREF) to be half of the maximum A/D converter input
voltage. For example, if VIN(MAX) = 2.5V, choose VREF =
1.25V. This forces the maximum de-integration time
(TDEINT) to be equal to twice the maximum integration
time (TINT), ensuring a full count (maximum resolution)
during DINT.
4.4.2
CALCULATE TINT
The TC520A counter length is 16-bits (65536), allowing
the full 65536 counts for TDEINT results in a maximum
TINT = 65536/2 or 32768.
4.4.3
SELECT SYSCLK FREQUENCY
SYSCLK frequency directly affects conversion time.
The faster the SYSCLK, the faster the conversion time.
The upper limit SYSCLK frequency is determined by
the worst case delay of the TC500 comparator (which
for the TC500 and TC500A is 3.2
sec). While a faster
value for SYSCLK can be used, operation is optimized
(error minimized) by choosing a SYSCLK period (1/
SYSCLK frequency) that is greater than 3.2
sec.
Choosing TSYSCLK =4sec makes the SYSCLK fre-
quency equal to 250kHz. This makes the external
crystal (or frequency source) equal to 1.0MHz, since
SYSCLK = crystal frequency/4). Calculating integration
time (in msec) using TSYSCLK =4sec, TINT =4sec x
32768 = 131msec.
4.4.4
CALCULATE LOAD VALUE
Plug the TINT and TSYSCLK values into the equation and
convert the resulting value to hexadecimal:
EQUATION 4-1:
In this example, LOAD VALUE = 128(10) = 10H. There-
fore, a LOAD VALUE of 10H is loaded into the TC520A.
If the desired TINT was 100msec instead of 131msec,
the LOAD VALUE would be 9EH, and so on. The
TC520A LOAD VALUE must be initialized on power-up,
and can be re-initialized as often as desired thereafter.
This is accomplished by bringing the LOAD input low
while transmitting the appropriate LOAD VALUE to the
TC520A as shown in Figure 4-1 and Figure 4-2.
4.4.5
POLLED VS. INTERRUPT
OPERATION
The TC520A can be accessed at any time by the host
processor. This makes operation in a polled environ-
ment especially easy since the most recently converted
data is available to the processor as needed. The
TC520A can also be used in an interrupt environment
by connecting DV to the IRQ line of the processor.
Since AZ is the first phase of a new conversion cycle,
the most recently converted data will be available as
soon as DV goes low. If so desired, the interrupt service
routine can also modify the LOAD VALUE during the
DV = low interval.
[(65536 - (TINT/TSYSCLK)]
256
LOAD VALUE =
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