参数资料
型号: TC682EOA
厂商: Microchip Technology
文件页数: 5/14页
文件大小: 0K
描述: IC REG SWITCHD CAP DBL INV 8SOIC
标准包装: 100
类型: 切换式电容器(充电泵),倍增器,反相
输出类型: 可调式
输出数: 1
输出电压: -4.8 V ~ -11 V
输入电压: 2.4 V ~ 5.5 V
频率 - 开关: 12kHz
电流 - 输出: 10mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 8-SOICN
产品目录页面: 664 (CN2011-ZH PDF)
TC682
4.0
4.1
TYPICAL APPLICATIONS
Negative Doubling Converter
Output voltage ripple is affected by C3. Typically the
larger the value of C3 the less the ripple for a given load
current. The formula for P-P V RIPPLE is given below:
The most common application of the TC682 is as a
charge pump voltage converter which provides a
negative output of two times a positive input voltage
(Figure 4-1).
+
V RIPPLE = {1/[2(f PUMP x C3)] + 2(ESR C3 )} (I OUT )
For a 10 μ F (0.5 Ω ESR) capacitor for C3, f PUMP = 10
kHz and I OUT = 10 mA the peak-to-peak ripple voltage
at the output will be less then 60 mV. In most
applications (I OUT < = 10 mA) a 10-20 μ F capacitor and
1-5 μ F pump capacitors will suffice. Table 4-2 shows
V RIPPLE for different values of C3 (assume 1 Ω ESR).
C 1
22 μ F
1
C 1 –
TABLE 4-1:
OUTPUT RESISTANCE
C 2
+
22 μ F
2 C 2 +
3 C 2 –
TC682
C 1 + 7
6
V IN
V IN
VS. C1, C2
C1, C2 ( μ F)
R OUT ( Ω )
4
V– OUT
GND
5
+
C 3
22 μ F
GND
0.05
0.10
0.47
4085
2084
510
V– OUT
1.00
285
FIGURE 4-1:
Inverting Voltage Doubler
3.30
5.00
145
125
4.2
Capacitor Selection
10.00
105
The output resistance of the TC682 is determined, in
part, by the ESR of the capacitors used. An expression
for R OUT is derived as shown below:
R OUT = 2(R SW1 + R SW2 + ESR C1 + R SW3 + R SW4 + ESR C2 )
+2(R SW1 + R SW2 + ESR C1 + R SW3 + R SW4 + ESR C2 )
+1/(f PUMP x C1) +1/(f PUMP x C2)
+ESR C3
Assuming all switch resistances are approximately
equal:
R OUT = 16R SW + 4ESR C1 + 4ESR C2 + ESR C3
+1/(f PUMP x C1) +1/(f PUMP x C2)
R OUT is typically 140 Ω at +25°C with V IN = +5V and 3.3
μ F low ESR capacitors. The fixed term (16R SW ) is
about 80-90 Ω . It can be seen easily that increasing or
decreasing values of C1 and C2 will affect efficiency by
changing R OUT . However, be careful about ESR. This
term can quickly become dominant with large electro-
lytic capacitors. Table 4-1 shows R OUT for various
values of C1 and C2 (assume 0.5 Ω ESR). C1 must be
rated at 6VDC or greater while C2 and C3 must be
rated at 12VDC or greater.
? 2006 Microchip Technology Inc.
22.00
100.00
TABLE 4-2:
C3 ( μ F)
0.50
1.00
3.30
5.00
10.00
22.00
100.00
94
87
V RIPPLE PEAK-TO-PEAK
VS. C3 (I OUT 10mA)
V RIPPLE (mV)
1020
520
172
120
70
43
25
DS21453C-page 5
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