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参数资料
| 型号： | TC7106ARCPLIJL |
| 元件分类： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, ACCESS, PDIP40 |
| 封装： | CERDIP-40 |
| 文件页数： | 3/21页 |
| 文件大小： | 269K |
| 代理商： | TC7106ARCPLIJL |
11
TC7106
TC7106A
TC7107
TC7107A
3-1/2 DIGIT A/D CONVERTERS
Integrating Capacitor – CINT
CINT should be selected to maximize the integrator
output voltage swing without causing output saturation. Due
to the TC7106A/7107A superior temperature coefficient
specification, analog common will normally supply the differ-
ential voltage reference. For this case a
±2V full-scale
integrator output swing is satisfactory. For 3 readings/
second (fOSC = 48kHz) a 0.22F value is suggested. If a
different oscillator frequency is used, CINT must be changed
in inverse proportion to maintain the nominal
±2 V integrator
swing.
An exact expression for CINT is:
CINT =
VINT
Where:
fOSC = Clock frequency at Pin 38
VFS = Full-scale input voltage
RINT = Integrating resistor
VINT = Desired full-scale integrator output swing
CINT must have low dielectric absorption to minimize
rollover error. A polypropylene capacitor is recommended.
Integrating Resistor – RINT
The input buffer amplifier and integrator are designed
with class A output stages. The output stage idling current
is 100
A. The integrator and buffer can supply 20A drive
currents with negligible linearity errors. RINT is chosen to
remain in the output stage linear drive region but not so large
that printed circuit board leakage currents induce errors. For
a 200mV full-scale, RINT is 47k. 2.0V full-scale requires
470k
.
Component
Nominal Full-Scale Voltage
Value
200.0mV
2.000V
CAZ
0.47
F
0.047
F
RINT
47k
470k
CINT
0.22
F
0.22
F
VFS
RINT
1
fOSC
(4000) (
) (
)
Note:1.
fOSC = 48kHz (3 readings/sec)
Oscillator Components
ROSC (Pin 40 to Pin 39) should be 100k. COSC is
selected using the equation:
For fOSC of 48kHz, COSC is 100pF nominally.
Note that fOSC is divided by four to generate the TC7106A
internal control clock. The backplane drive signal is derived
by dividing fOSC by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal-integrate period should be a multiple of 60Hz.
Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz,
48kHz, 40kHz, etc. should be selected. For 50 Hz rejection,
oscillator frequencies of 200kHz, 100kHz, 66 2/3kHz, 50kHz,
40kHz, etc. would be suitable. Note that 40kHz (2.5 read-
ings/second) will reject both 50Hz and 60Hz.
Reference Voltage Selection
A full-scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Required Full-Scale Voltage*
VREF
200.0mV
100.0mV
2.000V
1.000V
* VFS = 2 VREF
In some applications a scale factor other than unity may
exist between a transducer output voltage and the required
digital reading. Assume, for example, a pressure transducer
output is 400mV for 2000 lb/in2. Rather than dividing the
input voltage by two the reference voltage should be set to
200mV.
This permits the transducer input to be used
directly.
The differential reference can also be used when a
digital zero reading is required when VIN is not equal to zero.
This is common in temperature measuring instrumentation.
A compensating offset voltage can be applied between
analog common and V–
IN.
The transducer output is con-
nected between V+
IN and analog common.
The internal voltage reference potential available at
analog common will normally be used to supply the convert-
er's reference. This potential is stable whenever the supply
potential is greater than approximately 7V. In applications
where an externally-generated reference voltage is desired,
refer to Figure 7.
fOSC =
0.45
RC
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| TC7106CPLIJL | 1-CH DUAL-SLOPE ADC, ACCESS, PDIP40 |
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| TC7106ACPLIJL | 1-CH DUAL-SLOPE ADC, PDIP40 |
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