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| 型号： | TC7107IJL |
| 元件分类： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, CDIP40 |
| 封装： | CERDIP-40 |
| 文件页数： | 3/26页 |
| 文件大小： | 623K |
| 代理商： | TC7107IJL |
2002 Microchip Technology Inc.
DS21455B-page 11
TC7106/A/TC7107/A
6.0
DIGITAL SECTION (TC7107A)
Figure 6-2 shows a TC7107A block diagram.
It is
designed to drive common anode LEDs. It is identical
to the TC7106A, except that the regulated supply and
backplane drive have been eliminated and the segment
drive is typically 8mA. The 1000's output (Pin 19) sinks
current from two LED segments, and has a 16mA drive
capability.
In both devices, the polarity indication is “ON” for neg-
ative analog inputs. If VIN- and VIN+ are reversed, this
indication can be reversed also, if desired.
The display font is the same as the TC7106A.
6.1
System Timing
The oscillator frequency is divided by 4 prior to clocking
the internal decade counters. The four-phase mea-
surement cycle takes a total of 4000 counts, or 16,000
clock pulses. The 4000-count cycle is independent of
input signal magnitude.
Each phase of the measurement cycle has the follow-
ing length:
1.
Auto-zero phase: 1000 to 3000 counts (4000 to
12000 clock pulses).
For signals less than full scale, the auto-zero phase is
assigned the unused reference integrate time period:
2.
Signal integrate: 1000 counts (4000 clock
pulses).
This time period is fixed. The integration period is:
EQUATION 6-1:
3.
Reference Integrate: 0 to 2000 counts (0 to 8000
clock pulses).
The TC7106A/7107A are drop-in replacements for the
7106/7107 parts. External component value changes
are not required to benefit from the low drift internal
reference.
6.2
Clock Circuit
Three clocking methods may be used (see Figure 6-1):
1.
An external oscillator connected to Pin 40.
2.
A crystal between Pins 39 and 40.
3.
An RC oscillator using all three pins.
FIGURE 6-1:
CLOCK CIRCUITS
TSI = 4000
1
FOSC
Where: FOSC is the externally set clock frequency.
TC7106A
TC7107A
4
Crystal
RC Network
40
38
EXT
OSC
39
÷
To TEST Pin on TSC7106A
To GND Pin on TSC7107A
To
Counter
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