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| 型号： | TC7117CPL |
| 厂商： | Microchip Technology |
| 文件页数： | 8/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 3 1/2DGT LED DVR 40-DIP |
| 标准包装： | 10 |
| 显示器类型： | LED |
| 配置： | 7 段显示 |
| 数字或字符： | A/D，3.5 位数字 |
| 电流 - 电源： | 800µA |
| 电源电压： | 5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 40-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 40-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 673 (CN2011-ZH PDF) |
| 其它名称： | 158-1057 158-1057-ND |
TC7116/A/TC7117/A
3.0
DETAILED DESCRIPTION
Since the comparator is included in the loop, AZ
accuracy is limited only by system noise. The offset
(All Pin Designations Refer to 40-Pin PDIP.)
referred to the input is less than 10 μ V.
3.1
Analog Section
3.1.2
SIGNAL INTEGRATE PHASE
tion for the TC7116/TC7116A and TC7117/TC7117A.
Each measurement cycle is divided into three phases:
(1) Auto-Zero (AZ), (2) Signal Integrate (INT), and
(3) Reference Integrate (REF), or De-integrate (DE).
3.1.1 AUTO-ZERO PHASE
High and low inputs are disconnected from the pins and
internally shorted to analog common. The reference
capacitor is charged to the reference voltage. A feed-
back loop is closed around the system to charge the
auto-zero capacitor (C AZ ) to compensate for offset volt-
ages in the buffer amplifier, integrator, and comparator.
The auto-zero loop is opened, the internal short is
removed, and the internal high and low inputs are
connected to the external pins. The converter then inte-
grates the differential voltages between V IN + and V IN -
for a fixed time. This differential voltage can be within a
wide Common mode range: 1V of either supply. How-
ever, if the input signal has no return with respect to the
converter power supply, V IN - can be tied to analog
common to establish the correct Common mode
voltage. At the end of this phase, the polarity of the
integrated signal is determined.
C REF
R INT
C AZ
C INT
C REF +
V REF +
C REF -
V BUFF
V+
Auto-Zero
V INT
V+
34
36
33
28
35
29
27
V IN +
31
10 μ A
INT
AZ
AZ
DE
(–)
DE
(+)
AZ
–
+
–
+
Low
Temp.
Drift
Zener
V REF
Integrator
–
+
+
Comparator
To
Digital
Section
Analog
Common
V IN -
32
30
INT
DE (+) DE (–)
AZ & DE (±)
26
V+ -3V
TC7116
TC7116A
TC7117
TC7117A
V-
FIGURE 3-1:
Analog Section of TC7116/TC7116A and TC7117/TC7117A
3.1.3
REFERENCE INTEGRATE PHASE
3.1.4
REFERENCE
The final phase is reference integrate, or de-integrate.
Input low is internally connected to analog common
and input high is connected across the previously
charged reference capacitor. Circuitry within the chip
ensures that the capacitor will be connected with the
correct polarity to cause the integrator output to return
to zero. The time required for the output to return to
zero is proportional to the input signal. The digital
reading displayed is:
EQUATION 3-1:
The positive reference voltage (V REF +) is referred to
analog common.
DS21457C-page 8
1000 =
V IN
V REF
? 2006 Microchip Technology Inc.
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