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| 型号： | TC7129CPL |
| 元件分类： | ADC |
| 英文描述： | 1-CH 4-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP40 |
| 封装： | 0.600 INCH, MO-011, PLASTIC, DIP-40 |
| 文件页数： | 3/28页 |
| 文件大小： | 544K |
| 代理商： | TC7129CPL |
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2006 Microchip Technology Inc.
DS21459D-page 11
TC7129
Figure 4-6:
Temperature Compensating Circuits.
4.5
RC Oscillator
For applications in which 3-1/2 digit (100
μV) resolution
is sufficient, an RC oscillator is adequate. A recom-
mended value for the capacitor is 51 pF. Other values
can be used as long as they are sufficiently larger than
the circuit parasitic capacitance. The resistor value is
calculated as:
EQUATION 4-1:
For 120 kHz frequency and C = 51 pF, the calculated
value of R is 75 k
Ω. The RC oscillator and the crystal
oscillator circuits are shown in Figure 4-7.
Figure 4-7:
Oscillator Circuits.
4.6
Measuring Techniques
Two important techniques are used in the TC7129:
successive
integration
and
digital
auto-zeroing.
Successive integration is a refinement to the traditional
dual-slope conversion technique.
4.7
Dual-Slope Conversion
A dual-slope conversion has two basic phases: inte-
grate and de-integrate. During the integrate phase, the
input signal is integrated for a fixed period of time; the
integrated voltage level is thus proportional to the input
voltage. During the de-integrate phase, the integrated
voltage is ramped down at a fixed slope, and a counter
counts the clock cycles until the integrator voltage
crosses zero. The count is a measurement of the time
to ramp the integrated voltage to zero and is, therefore,
proportional to the input voltage being measured. This
count can then be scaled and displayed as a measure-
ment of the input voltage. Figure 4-8 shows the phases
of the dual-slope conversion.
Figure 4-8:
Dual-Slope Conversion.
The dual-slope method has a fundamental limitation.
The count can only stop on a clock cycle, so that mea-
surement accuracy is limited to the clock frequency. In
addition, a delay in the zero-crossing comparator can
add to the inaccuracy. Figure 4-9 shows these errors in
an actual measurement.
TC7129
+
–
1N4148
5 k
Ω
75 k
Ω
200 k
Ω
39 k
Ω
19
36
24
23
V–
V+
VDISP
DGND
TC7129
2N2222
39 k
Ω
19
36
24
23
V–
V+
VDISP
DGND
20 k
Ω
18 k
Ω
R =
0.45
Freq * C
TC7129
1
40
2
270 k
Ω
10 pF
V+
120 kHz
5 pF
V+
1
40
2
51 pF
75 k
Ω
De-integrate
Zero
Crossing
Time
Integrate
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