参数资料
型号: TC7662BEOAG
元件分类: 稳压器
英文描述: SWITCHED CAPACITOR REGULATOR, 35 kHz SWITCHING FREQ-MAX, PDSO8
封装: SOIC-8
文件页数: 5/11页
文件大小: 92K
代理商: TC7662BEOAG
3
TC7662B
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B-8 9/11/96
2001 Microchip Technology Inc.
DS21469A
Figure 2. Idealized Negative Voltage Capacitor
THEORETICAL POWER EFFICIENCY
CONSIDERATIONS
In theory, a voltage converter can approach 100%
efficiency if certain conditions are met:
A. The drive circuitry consumes minimal power.
B. The output switches have extremely low ON resistance
and virtually no offset.
C. The impedances of the pump and reservoir capacitors
are negligible at the pump frequency.
The TC7662B approaches these conditions for nega-
tive voltage conversion if large values of C1 and C2 are used.
Energy is lost only in the transfer of charge between
capacitors if a change in voltage occurs. The energy lost
is defined by:
E = 1/2 C1 (V12 – V22)
where V1 and V2 are the voltages on C1 during the pump and
transfer cycles. If the impedances of C1 and C2 are relatively
high at the pump frequency (refer to Figure 2) compared to
the value of RL, there will be a substantial difference in
voltages V1 and V2. Therefore, it is desirable not only to
make C2 as large as possible to eliminate output voltage
ripple, but also to employ a correspondingly large value for
C1 in order to achieve maximum efficiency of operation.
Dos and Don’ts
1. Do not exceed maximum supply voltages.
2. Do not connect the LV terminal to GND for supply
voltages greater than 3.5 volts.
3. Do not short circuit the output to V+ supply for voltages
above 5.5 volts for extended periods; however,
transient conditions including start-up are okay.
DETAILED DESCRIPTION
The TC7662B contains all the necessary circuitry to
complete a negative voltage converter, with the exception of
two external capacitors which may be inexpensive 1
F
polarized electrolytic types. The mode of operation of the
device may be best understood by considering Figure 2,
which shows an idealized negative voltage converter. Ca-
pacitor C1 is charged to a voltage V+ for the half cycle when
switches S1 and S3 are closed. (Note: Switches S2 and S4
are open during this half cycle.) During the second half cycle
of operation, switches S2 and S4 are closed, with S1 and S3
open, thereby shifting capacitor C1 negatively by V+ volts.
Charge is then transferred from C1 to C2 such that the
voltage on C2 is exactly V+, assuming ideal switches and no
load on C2. The TC7662B approaches this ideal situation
more closely than existing non-mechanical circuits.
In the TC7662B, the four switches of Figure 2 are MOS
power switches; S1 is a P-channel device and S2, S3 and S4
are N-channel devices. The main difficulty with this ap-
proach is that in integrating the switches, the substrates of
S3 and S4 must always remain reverse biased with respect
to their sources, but not so much as to degrade their “ON”
resistances. In addition, at circuit start up, and under output
short circuit conditions (VOUT = V+), the output voltage must
be sensed and the substrate bias adjusted accordingly.
Failure to accomplish this would result in high power losses
and probable device latchup.
The problem is eliminated in the TC7662B by a logic
network which senses the output voltage (VOUT) together
with the level translators, and switches the substrates of S3
and S4 to the correct level to maintain necessary reverse
bias.
The voltage regulator portion of the TC7662B is an
integral part of the anti-latchup circuitry; however, its inher-
ent voltage drop can degrade operation at low voltages.
Therefore, to improve low voltage operation, the “LV” pin
should be connected to GND, disabling the regulator. For
supply voltages greater than 3.5 volts, the LV terminal must
be left open to insure latchup proof operation and prevent
device damage.
Figure 1. TC7662B Test Circuit
1
2
3
4
8
7
6
5
TC7662B
+
V+
(+5V)
V+
VO
C1
10
F
+
C2
10
F
IL
RL
NOTE: For large values of COSC (>1000 pF), the values
of C1 and C2 should be increased to 100 F.
IS
VIN
S3
S1
S2
S4
C2
VOUT = – VIN
C1
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