参数资料
型号: TC90A58F
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封装: 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件页数: 10/36页
文件大小: 439K
代理商: TC90A58F
TC90A58F
2002-02-06
18
Sub-Address 03H
Bit
7 (MSB)
6
5
4
3
2
1
0 (LSB)
Name
HVSEL65
INTER
VNSOFF
VDPO
VDDIRECT
HDPO
HDDIRECT
HRTMG10
Default
0
1
HVSEL65: Changes the HD and VD output timing in relation to EAV.
0 (default): HD and VD output timing is the same as EAV.
1: HD and VD output timing is delayed in relation to EAV by
+32 clocks for NTSC and by +24
clocks for PAL.
INTER: Sets the VD output to be once or twice per frame (Note4).
(Enabled only when VRNMOD
= 1)
0 (default): Outputs VD for each field.
1: Outputs VD per frame.
Note4: A frame consists of 525 lines for NTSC; 625 lines for PAL.
VNSOFF: Enables/Disables VD input.
0 (default): Enables VD input.
1: Disables VD input.
VDPO: Sets the VD input polarity.
0 (default): Same polarity
1: Opposite polarity
VDDIRECT: Selects VD input.
0 (default): Identifies input pulses of 8 clocks or more as VD input.
1: Identifies input pulses of 1 clock or more as VD input.
HDPO: Sets the HD input polarity.
0 (default): Same polarity
1: Opposite polarity
HDDIRECT: Selects HD input.
0 (default): Identifies input pulses of 8 clocks or more as HD input.
1: Identifies input pulses of 1 clock or more as HD input.
HRTMG10: Sets the number of samples per 1H. Sets in combination with HRTMG9~HRTMG2 in
Sub-Address 04H and HRTMG1~HRTMG0 in Sub-Address 05H.
Sub-Address 04H
Bit
7 (MSB)
6
5
4
3
2
1
0 (LSB)
Name
HRTMG9
HRTMG8
HRTMG7
HRTMG6
HRTMG5
HRTMG4
HRTMG3
HRTMG2
Default
1
0
1
0
1
0
HRTMG9~HRTMG2: Sets the number of samples per 1H. This setting works in combination
with HRTMG10 in Sub-Address 03H and HRTMG1~HRTMG0 in Sub-Address
05H.
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