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参数资料
| 型号： | TC90A66F |
| 厂商： | Toshiba Corporation |
| 英文描述： | PAP/PIP/POP Controller for Wide-Screen TVs (PAL/NTSC) |
| 中文描述： | 人民行动党/画中画/持久性有机污染物控制的宽屏幕电视（PAL / NTSC制式） |
| 文件页数： | 10/39页 |
| 文件大小： | 488K |
| 代理商： | TC90A66F |
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TC90A66F
2001-06-07
10
Pin Number Pin Name
Function
46
WHREFS
(S system) PLL phase comparison output.
The HREF signal obtained by the I/N divider circuit or the phase comparison result of sub picture (S)
horizontal sync signal. This signal is used to control the external VCO voltage.
48
EWMCK
Outputs sub picture E write clock to external field memory.
Output amplitude is 3.3 V
p-p
typical.
50
WMCK
Outputs sub picture S write clock to external field memory.
Output amplitude is 3.3 V
p-p
typical.
52
EWIEN
Control signal output pin for external field memory (sub picture E).
Output amplitude is 3.3 V
p-p
typical.
53
EWEN
Control signal output pin for external field memory (sub picture E).
Output amplitude is 3.3 V
p-p
typical.
54
EWRST
Control signal output pin for external field memory (sub picture E).
Output amplitude is 3.3 V
p-p
typical.
55
WIEN
Control signal output pin for external field memory (sub picture S).
Output amplitude is 3.3 V
p-p
typical.
56
WEN
Control signal output pin for external field memory (sub picture S).
Output amplitude is 3.3 V
p-p
typical.
57
WRST
Control signal output pin for external field memory (sub picture S).
Output amplitude is 3.3 V
p-p
typical.
58 to 65
WDAC7-0 Output signal to write to external field memory. (I, Q or E system).
Output amplitude is 3.3 V
p-p
typical.
Connect only when using 4M memory.
MSB: WDAC7, LSB: WDAC0
67 to 75
WDAY7-0 Output signal to write to external field memory. (Y or S system).
Output amplitude is 3.3 V
p-p
typical.
MSB: WDAY7, LSB: WDAY0
75 to 82
RDAC0-7
Input signal to read from external field memory (I, Q or E system).
It is composing 5 V interface.
Connect only when using 4M memory.
MSB: RDAC7, LSB: RDAC0
84 to 91
RDAY0-7
Input signal to read from external field memory (Y or S system).
It is composing 5 V interface.
MSB: RDAY7, LSB: RDAY0
92
REN
Control signal output pin for external field memory (sub picture S).
Output amplitude is 3.3 V
p-p
typical.
93
RRST
Control signal output pin for external field memory (sub picture S).
Output amplitude is 3.3 V
p-p
typical.
94
EREN
Control signal output pin for external field memory (sub picture E).
Output amplitude is 3.3 V
p-p
typical.
95
ERRST
Control signal output pin for external field memory (sub picture E).
Output amplitude is 3.3 V
p-p
typical.
96
RMCK
Outputs read clock to external field memory.
Output amplitude is 3.3 V
p-p
typical.
Outputs 1200 fH for both 4M and 2M memory.
97
RMCKI
RMCK phase adjustment input pin. Inputs RMCK.
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