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参数资料
| 型号： | TC9332F |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP60 |
| 封装： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-60 |
| 文件页数： | 8/28页 |
| 文件大小： | 613K |
| 代理商： | TC9332F |
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TC9332F
16
(4)
Control registers and dedicated interface registers
(4-1) Control register 2 (CNT-R2) (Note 3)
(*: default value)
Bit
Symbol
Description of Functions
0*
Generates internally
15
LRIS1
Selects channel clock or bit clock for audio serial data input from the
SDI1 terminal.
1
ELRI1/EBCI1
0*
16 bit
14
BCIS1
Selects bit length of audio serial data input from the SDI1 terminal.
1
24 bit
0*
MSB first
13
SIFMT1
Selects format of audio serial data input from the SDI1 terminal.
1
LSB first
0*
Generates internally
12
LRIS0
Selects a channel clock or bit clock for audio serial data input from the
SDI0 terminal.
1
ELRIO/EBCIO
0*
16 bit
11
BCIS0
Selects bit length of audio serial data input from the SDI0 terminal.
1
24 bit
0*
MSB first
10
SIFMT0
Selects format of audio serial data input from the SDI0 terminal.
1
LSB first
0*
SDI0
9
SISEL
Selects input terminal for input register SDI0.
1
SDI1
0*
Generates internally
8
LROS2
Selects a channel clock or bit clock for audio serial data output to the
SDO2 terminal.
(Note 4) 1
ELRO/EBCO
0*
FS32 (16 bit/ch)
7
BCOS2
Selects an internally generated bit clock for audio serial data output to
the SDO2 terminal.
1
FS64 (32 bit/ch)
0*
Effective data after
the change point of
LRCK
6
SOFMT2 Selects whether audio serial data output to the SDO2 pin are to be
effective data after the change point of LRCK or 8 clock shifted.
1
8 clock shifted
0*
Generates internally
5
LROS1
Selects a channel clock or bit clock for audio serial data output to the
SDO1 terminal.
(Note 4) 1
ELRO/EBCO
0*
FS32 (16 bit/ch)
4
BCOS1
Selects an internally generated bit clock for audio serial data output to
the SDO1 terminal.
1
FS64 (32 bit/ch)
0*
Effective data after
the change point of
LRCK
3
SOFMT1 Selects whether audio serial data output to the SDO1 terminal are to
be effective data after the change point of LRCK or 8 clock shifted.
1
8 clock shifted
0*
Generates internally
2
LROS0
Selects a channel clock or bit clock for audio serial data output to the
SDO0 terminal.
(Note 4) 1
ELRO/EBCO terminal
input
0*
FS32 (16 bit/ch)
1
BCOS0
Selects an internally generated bit clock for audio serial data output to
the SDO0 terminal.
1
FS64 (32 bit/ch)
0*
Effective data after
the change point of
LRCK
0
SOFMT0 Selects whether audio serial data output to the SDO0 terminal are to
be effective data after the change point of LRCK or 8 clock shifted.
1
8 clock shifted
Note 3: Normally set only once at initialization.
Data can be set in CNT-R2 asynchronously with the SYNC signal.
Note 4: When a channel clock or bit clock is externally input, (LROS bits 2~0 set to “1”), the data can be
output to pins SDO2~0 with 8 clock shifted by setting SOFMT~0.
Data can also be output with 8 clock shifted by program (operation) without the above setting.
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