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参数资料
| 型号： | TCM320AC46CDW |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO20 |
| 封装： | SOIC-20 |
| 文件页数： | 7/19页 |
| 文件大小： | 249K |
| 代理商： | TCM320AC46CDW |
TCM320AC46
GENERALPURPOSE AUDIO INTERFACE FOR DSP
SLWS001 D4091, JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
15
PARAMETER MEASUREMENT INFORMATION
All timing parameters are referenced to VIH and VIL. Bit 1 = MSB (most significant bit) and is clocked in first on DIN
or clocked out first on DOUT. Bit n = LSB (least significant bit) and is clocked in last on DIN or is clocked out last on
DOUT. N = 8 for the companded mode, and N = 16 for the linear mode.
N 2
N 1
N
1
2
34
N 1
N
1
N+1
N
N 1
N 2
4
3
2
1
0
CLK
FSR
DIN
tsu(FSR)
th(FSR)
See Note B
See Note A
th(DIN)
tsu(DIN)
Receive Time Slot
20%
80%
See Note C
80%
20%
NOTES: A. This window is allowed for FSR high.
B. This window is allowed for FSR low.
C. Transitions are measured at 50%.
Figure 2. Fixed-Data-Rate, Receive Side Timing Diagram
N 1
N 2
3
2
1
N+1
N
N 1
N 2
4
3
2
1
0
N
tsu(FSX)
th(FSX)
CLK
FSX
DOUT
TSX
See Note B
See Note A
tpd2
tpd3
tpd1
tpd4
tpd5
Transmit Time Slot
20%
80%
20%
80%
See Note C
20%
80%
20%
80%
NOTES: A. This window is allowed for FSX high.
B. This window is allowed for FSX low (th(FSX) max determined by data collision considerations).
C. Transitions are measured at 50%.
Figure 3. Fixed-Data-Rate, Transmit Side Timing Diagram
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