参数资料
型号: TCM812FERCTR
厂商: Microchip Technology
文件页数: 7/16页
文件大小: 0K
描述: IC RESET MONITOR 1.75V SOT143-4
标准包装: 3,000
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 140 ms
电压 - 阀值: 1.75V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: TO-253-4,TO-253AA
供应商设备封装: SOT-143
包装: 带卷 (TR)
TCM811/TCM812
4.0 APPLICATIONS INFORMATION
The TCM811/TCM812 provides accurate V DD
monitoring and reset timing during power-up, power-
down, and brownout/sag conditions. These devices
also reject negative-going transients (glitches) on the
power supply line. Figure 4-1 shows the maximum
transient duration vs. maximum negative excursion
(overdrive) for glitch rejection. Any combination of
duration and overdrive that is under the curve will not
generate a reset signal. Combinations above the curve
such that it does not appreciably load RESET under
normal operation (100 k Ω will be suitable for most
applications). Similarly, a pull-up resistor to V DD is
required for the TCM812 to ensure a valid high RESET
for V DD below 1.1V.
V DD
4
are detected as a brownout or power-down. Transient
immunity can be improved by adding a 0.1 μF capacitor
0.1μF
V DD
in close proximity to the V DD pin of the TCM811/
TCM812.
V DD
V TH
TCM811
RESET
GND
1
2
R 1
100 k Ω
Overdrive = V D D
FIGURE 4-2: The addition of R 1 at the
RESET output of the TCM811 ensures that the
Duration
RESET output is valid to V DD = 0V.
400
320
T A = +25?C
4.2
Controllers and Processors With
Bidirectional I/O Pins
Some microcontrollers have bidirectional reset pins.
240
160
80
TCM81xL/M
Depending on the current drive capability of the
controller pin, an indeterminate logic level may result if
there is a logic conflict. This can be avoided by adding
a 4.7 k Ω resistor in series with the output of the
TCM811/TCM812 ( Figure 4-3 ). If there are other
components in the system which require a reset signal,
0
TCM81xR/S/T
1 10 100
RESET COMPARATOR OVERDRIVE,
1000
they should be buffered so as not to load the reset line.
If the other components are required to follow the reset
I/O of the microcontroller, the buffer should be
connected as shown with the solid line.
VTH - VDD (mV)
FIGURE 4-1: Maximum Transient Duration
vs. Overdrive for Glitch Rejection at +25°C.
BUFFER
Buffered RESET
To Other System
Components
4.1 RESET Signal Integrity During
Power-Down
The TCM811 RESET push-pull output is valid to
V DD = 1.0V. Below this voltage the output becomes an
"open circuit" and does not sink current. This means
CMOS logic inputs to the microcontroller will be floating
at an undetermined voltage. Most digital systems are
0.1μF
V DD
4
TCM811
RESET
2
4.7 k Ω
Micro
controller
RESET
completely shutdown well above this voltage. How-
ever, in situations where RESET must be maintained
valid to V DD = 0V, a pull-down resistor must be con-
nected from RESET to ground to discharge stray
capacitances and hold the output low ( Figure 4-2 ). This
FIGURE 4-3:
GND
1
GND
Interfacing the TCM811 to a
resistor value, though not critical, should be chosen
? 2007 Microchip Technology Inc.
Bidirectional Reset I/O.
DS21615C-page 7
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