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参数资料
| 型号： | TDA16822 |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 稳压器 |
| 英文描述： | 2.5 A SWITCHING REGULATOR, 107 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封装： | PLASTIC, DIP-8 |
| 文件页数： | 3/14页 |
| 文件大小： | 234K |
| 代理商： | TDA16822 |
TDA 16822
CoolSET
Version 2.0
11
11 April 2000
4 Operation Description
Power Management
The undervoltage lockout monitors the external supply
voltage V
CC.
When V
CC
exceeds the on-threshold
V
CCon=14V, the internal bias circuit and the voltage
reference are switched on. Additionally the error-latch
in the protection unit is reset. The internal bandgap
generates a reference voltage V
REF=6.55V to supply
the internal circuits. When V
CC falls below the off-
threshold V
CCoff=9V the circuit is switched off. Then the
power down reset discharges the soft-start capacitor
C
Soft-Start at pin SoftS by switching on T1. During start up
the current consumption is only about 100uA.
Improved Current Mode
- PWM-OP
The input of the PWM-OP is applied to the external
sense resistor R
Sense connected to pin ISense. RSense
allows
an
individual
adjustment
of
maximum
CoolMOS source current with very low tolerance of
maximum current threshold. R
Sense converts the source
current of the CoolMOS into a sense voltage. The
sense voltage is amplified with a gain of 3.65. Then the
amplified signal is superimposed on a virtual ramp of
0.8V. Under low load conditions the source current of
the CoolMOS is insufficient to built a voltage ramp for
the
PWM-Comparator.
To
guaranted
a
proper
operation at low load the virtual ramp is the reference
signal for the PWM-Comparator. The output of the
PWM-OP is connected to the positive inputs of the
PWM-Comparator and the Soft-Start-Comparator.
- PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the CoolMOS with the feedback signal V
FB
. V
FB is created by an external optocoupler or external
transistor in combination with the internal pullup
resistor R
FB
and provides the information of the
feedback circuitry. When the amplified current signal of
the CoolMOS exceeds the signal V
FB the PWM-
Comparator switches off the CoolMOS.
Soft-Start
The Soft-Start is realized by the internal Soft-Start-
Comparator and pullup resistor R
Soft-Start. The Soft-
Start-Comparator compares the voltage at pin SoftS at
the negative input with the ramp-signal of the PWM-OP
at the positive input. When the Soft-Start voltage V
Soft-
Start is less than the Feedback voltage VFB the Soft-
Start-Comparator limits the pulse width by reseting the
driver. The Soft-Start also controls the starting phase of
the hiccup mode by the Comparators C2 and C5 in
case of overload or open loop. The Soft-Start voltage is
generated by an external capacitor C
Soft-Start at pin
SoftS and the internal pullup resistor R
Soft-Start
by
charging the external capacitor C
Soft-Start.
Current Limiting
There is a cycle by cycle current limiting realised with
the Current-Limiting Comparator. The CoolMOS
source current is sensed via an external sense resistor
R
Sense. When the voltage VSense at RSense exceeds the
internal threshold voltage V
csth
the Current-Limit-
Comparator immediately turns off the gate drive.
- Propagation Delay Compensation
Concerning circuit delay there is an overshoot of the
peak current I
pk which depends on the ratio of dI/dt of
the peak current. A propagation delay compensation is
integrated to bound the tolerance of the current limiting
at +/-5% plus the tolerances of R
Sense.
This means the propagation delay time between
exceeding the current sense threshold V
csth
and
CoolMOS switch off is compensated within a range
of
E.g. I
pk=0.5A at fswitch=100kHz. Without propagation
delay compensation the current sense threshold is set
to V
csth=1V. A current ramp of dI/dt=0.4A/us and a
propagation delay time of t
csth-delay=180ns leads to an
I
pk
overshoot of 12%. With the propagation delay
compensation the overshoot is only about 2%. A
current ramp of dI/dt=0.1A/us leads to an overshoot of
3% in both cases, with and without compensation. For
further information see Figure 4 on page 8.
Oscillator
The oscillator generates a frequency f
switch = 100kHz. A
resistor, a capacitor and a current source which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very high accuracy switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum PWM duty cycle D
max=0.72.
PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch
when
initiating
the
CoolMOS
conduction. After setting the PWM-Latch can be reset
by the PWM-OP, the Soft-Start-Comparator, the
Current-Limit-Comparator or the Error-Latch of the
Protection Unit. In case of reseting the driver is shut
down directly.
Driver
The driver-stage drives the gate of the CoolMOS
and is optimized to minimize EMI and to provide high
circuit efficiency. This is done by reducing the switch on
slope when reaching the CoolMOS threshold. Thus
the leading switch on spike is minimized. When
CoolMOS is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage.
s
A
dt
dI
/
5
.
0
≤
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