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参数资料
| 型号： | TDA19977BHV/15/C1 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 封装： | 20 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-026, SOT612-3, HLQFP-144 |
| 文件页数： | 7/40页 |
| 文件大小： | 181K |
| 代理商： | TDA19977BHV/15/C1 |
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TDA19977A_TDA19977B_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 7 August 2008
15 of 40
NXP Semiconductors
TDA19977A; TDA19977B
Triple input HDMI receiver interface with digital processing
8.19 4:2:2 formatter
The 4:2:2 formatter contains the YCbCr 4:2:2 semi-planar and the YCbCr 4:2:2
ITU-R BT.656 formatting functions. The selection of these functions is made using the
I2C-bus.
In YCbCr 4:2:2 mode: the data frequency for the Y signal is equal to the pixel clock
frequency. While the data frequency for the Cb and Cr signals is equal to half the pixel
clock frequency
In semi-planar mode: the output clock should be the same as the pixel clock
In ITU-R BT.656 mode: the data frequency should be the same as the formatter clock
frequency (e.g. pixel clock
× 2)
The Start Active Video (SAV) and End Active Video (EAV) timing reference codes can be
included in the data stream based on the HREF, VREF and FREF positions from the
VHREF timing generator.
Specic codes programmed using the I2C-bus can replace the data stream during the
blanking period to mask gain and clamp calibration.
8.20 Video port selection
“Output video port formats” on page 22) to optimize board layout at the interface with
video processing ICs. For example:
R, G or B in RGB 4:4:4 mode on VP[29:20]
Y, Cb or Cr in YUV 4:4:4 mode on VP[19:10]
Y or Cb-Cr in 4:2:2 semi-planar mode on VP[9:0]
Cb-Y-Cr-Y in 4:2:2 ITU-R BT.656 mode on VP[9:0]
Each video port can be set to high-impedance using the I2C-bus.
8.21 Output buffers
The levels of the output buffers are LV-TTL compatible. Switching the outputs between
active and high-impedance is set using the I2C-bus.
The outputs HREF, VREF and FREF can be set to high-impedance (Z) or forced LOW (L),
independently of the timing reference codes.
8.22 VHREF timing generator
The VHREF timing generator outputs all of the timing signals used by the device:
VREF, HREF and FREF signals for SAV, EAV and active video area denition
VS and HS to change width and position compared with the HDMI inputs
8.23 I2C-bus serial interface
The I2C-bus serial interface enables the internal registers of the device to be programmed.
The slave address of the device is selected by pin A0.
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PDF描述 |
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| TDA2003-TA5-T | 12 W, 1 CHANNEL, AUDIO AMPLIFIER, SFM5 |
| TDA2003-TB5-T | 12 W, 1 CHANNEL, AUDIO AMPLIFIER, ZFM5 |
| TDA2003G-TA5-T | 12 W, 1 CHANNEL, AUDIO AMPLIFIER, SFM5 |
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| TDA2003L-TA5-T | 12 W, 1 CHANNEL, AUDIO AMPLIFIER, SFM5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TDA19978A | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Quad HDMI 1.3a receiver interface with equalizer (HDTV up to 1080p, up to UXGA for PC formats) |
| TDA19978AHV | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Quad HDMI 1.3a receiver interface with equalizer (HDTV up to 1080p, up to UXGA for PC formats) |
| TDA19978AHV/15,518 | 功能描述:视频 IC IC SMART CARD INTF RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TDA19978AHV/15,551 | 制造商:NXP Semiconductors 功能描述:TDA19978AHV/HLQFP144/TRAYBDP//15/C182 - Trays |
| TDA19978AHV/15,557 | 功能描述:视频 IC IC SMART CARD INTF RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
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