参数资料
型号: TDA6650ATT/C3/S2
厂商: NXP SEMICONDUCTORS
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO38
封装: 4.40 MM, 0.50 MM PITCH, PLASTIC, MO-153, SOT510-1, TSSOP-38
文件页数: 18/54页
文件大小: 325K
代理商: TDA6650ATT/C3/S2
TDA6650ATT_6651ATT_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 2 February 2007
25 of 54
NXP Semiconductors
TDA6650ATT; TDA6651ATT
5 V mixer/oscillator and low noise PLL synthesizer
f
osc(T)
oscillator frequency drift
with temperature
T=25 °C; V
CC = 5 V with
compensation
900
-
kHz
Φosc(dig)
phase noise, carrier to
sideband noise in digital
application
TDA6650ATT/C3/S2;
TDA6651ATT/C3/S2;
TDA6651ATT/C3/S3
±1 kHz frequency offset;
fcomp = 4 MHz;
82
90
-
dBc/Hz
±10 kHz frequency offset; worst
case in the frequency range;
87
94
-
dBc/Hz
±100 kHz frequency offset; worst
case in the frequency range;
see Figure 10, 27 and 28
104
115
-
dBc/Hz
±1.4 MHz frequency offset; worst
case in the frequency range;
see Figure 27 and 28
-
117
-
dBc/Hz
Φosc(hyb)
phase noise, carrier to
sideband noise in hybrid
application
TDA6650ATT/C3; TDA6651ATT/C3
±1 kHz frequency offset;
fcomp = 4 MHz; see Figure 11, 29
and 30
75
81
-
dBc/Hz
±10 kHz frequency offset; worst
case in the frequency range;
see Figure 12, 29 and 30
85
92
-
dBc/Hz
±100 kHz frequency offset; worst
case in the frequency range;
see Figure 13, 29 and 30
104
115
-
dBc/Hz
±1.4 MHz frequency offset; worst
case in the frequency range;
see Figure 29 and 30
-
117
-
dBc/Hz
RSCp-p
ripple susceptibility of
VCC (peak-to-peak
value)
VCC =5V ± 5 %; worst case in the
frequency range; ripple frequency
500 kHz
200
-
mV
Mid band oscillator
fosc
oscillator operating
frequency
222
-
522.143 MHz
oscillator frequency
[7] 276
-
522.143 MHz
fosc(V)
oscillator frequency shift
with supply voltage
300
-
kHz
fosc(T)
oscillator frequency drift
with temperature
T=25 °C; V
CC = 5 V with
compensation
1500
-
kHz
Table 20.
Characteristics …continued
VCCA =VCCD =5V; Tamb =25 °C; values are given for an asymmetrical IF output loaded with a 75 load or with a
symmetrical IF output loaded with 1.25 k
; positive currents are entering the IC and negative currents are going out of the IC;
the performances of the circuits are measured in the measurement circuits Figure 27 and 28 for digital application or in the
measurement circuits Figure 29 and 30 for hybrid application; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
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