参数资料
型号: TDA8354Q/N2
厂商: NXP SEMICONDUCTORS
元件分类: 偏转
英文描述: VERTICAL DEFLECTION IC, PZIP13
封装: POWER, PLASTIC, SOT-141-6, DIL-BENT-SIL, 13 PIN
文件页数: 14/18页
文件大小: 154K
代理商: TDA8354Q/N2
1998 Sep 03
5
Philips Semiconductors
Preliminary specication
Full bridge current driven vertical deection
output circuit in LVDMOS
TDA8354Q
Guard circuit
A guard circuit with output signal Vo(guard) is provided.
The guard circuit generates an active HIGH level during
the flyback period. The guard circuit is also activated for
one or more of the following conditions:
When the thermal protection is activated (Tj ≈ 170 °C)
During short-circuit of the output pins (pins 5 and 9) to
VP or ground
During open coil
During open loop
During short-circuit of the input pins (pins 11 and 12) to
VP or ground.
An active HIGH level of the guard signal is also generated
for the next conditions:
No drive signal
Short-circuit of the coil.
However, for these events the signal is generated via an
internal timer circuit. The guard signal set via this timer has
a delay of
≈120 ms. The delay time is given by the lowest
applicable field frequency.
The guard signal can be used for blanking the picture tube
screen and signalling a fault condition.
Damping resistor compensation
For HF-loop stability a damping resistor is connected
across the deflection coil. There is a big difference in
current in the damping resistor Rp during scan and flyback.
The resistor current is summed to the current in the
deflection coil via the measuring resistor RM, which results
in a too low current in the deflection coil at the start of the
scan.
To reach a short settling time the difference in the current
during scan and flyback in the damping resistor can be
compensated for by external means. To do so a resistor
(Rcomp) of about 1 M can be connected between the
output of stage A (pin 9) and the damping resistor
compensation current input (pin 13).
For a more accurate calculation of Rcomp refer to the
following formula:
R
comp
V
flb
V
loss
V
P
() R
p
×
R
con
×
V
flb
V
loss
I
L
R
L
×
() R
M
×
---------------------------------------------------------------------------------
=
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