参数资料
型号: TEA1742T
厂商: NXP SEMICONDUCTORS
元件分类: 稳压器
英文描述: 2 A POWER FACTOR CONTROLLER, 150 kHz SWITCHING FREQ-MAX, PDSO8
封装: 3.90 MM, PLASTIC, MS-012, SOT96-1, SOP-8
文件页数: 15/17页
文件大小: 99K
代理商: TEA1742T
TEA1742T_1
NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
7 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. The next stroke is started if the voltage across the PFC
MOSFET is at its minimum in order to reduce switching losses and ElectroMagnetic
Interference (EMI) (valley switching).
If no demagnetization signal is detected on the PFCAUX pin, the controller generates a
Zero Current Signal (ZCS), 50 ms (typ) after the last PFCGATE signal.
If no valley signal is detected on the PFCAUX pin, the controller generates a valley signal
4 ms (typ) after demagnetization was detected.
To protect the internal circuitry, for example during lightning events, it is advisable to add a
5k
series resistor to this pin. To prevent incorrect switching due to external disturbance,
the resistor should be placed close to the IC on the printed circuit board.
7.2.3 Frequency limitation
To optimize the transformer and minimize switching losses, the switching frequency is
limited to fsw(PFC)max. If the frequency for quasi-resonant operation is above the fsw(PFC)max
limit, the system switches over to discontinuous conduction mode. Also here, the PFC
MOSFET is only switched on at a minimum voltage across the switch (valley switching).
7.2.4 Mains voltage compensation (VINSENSE pin)
The mathematical equation for the transfer function of a power factor corrector contains
the square of the mains input voltage. In a typical application this results in a low
bandwidth for low mains input voltages, while at high mains input voltages the Mains
Harmonic Reduction (MHR) requirements may be hard to meet.
To compensate for the mains input voltage inuence, the TEA1742T contains a correction
circuit. Via the VINSENSE pin the average input voltage is measured and the information
is fed to an internal compensation circuit. With this compensation it is possible to keep the
regulation loop bandwidth constant over the full mains input range, yielding a fast transient
response on load steps, while still complying with class-D MHR requirements.
In a typical application, the bandwidth of the regulation loop is set by a resistor and two
capacitors on the PFCCOMP pin.
7.2.5 Soft start-up (pin PFCSENSE)
To prevent audible transformer noise at start-up or during hiccup, the transformer peak
current, IDM, is increased slowly by the soft start function. This can be achieved by
inserting RSS1 and CSS1 between pin PFCSENSE and current sense resistor RSENSE1.
An internal current source charges the capacitor to VPFCSENSE =Istart(soft)PFC × RSS1. The
voltage is limited to Vstart(soft)PFC.
The start level and the time constant of the increasing primary current level can be
adjusted externally by changing the values of RSS1 and CSS1.
τsoftstart
3
R
SS1
C
SS1
×
=
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