参数资料
型号: TEA1752LT/N1,518
厂商: NXP Semiconductors
文件页数: 16/34页
文件大小: 0K
描述: IC CTLR SMPS SW MODE 16SOIC
标准包装: 1
输出隔离: 隔离
输入电压: 14 V ~ 38 V
功率(瓦特): 600mW
工作温度: -40°C ~ 150°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SO
包装: 标准包装
其它名称: 568-5962-6
NXP Semiconductors
TEA1752T; TEA1752LT
GreenChip III SMPS control IC
drain
valley
secondary
stroke
primary
stroke
secondary
stroke
secondary
ringing
(2)
(1)
oscillator
014aaa027
(1) Start of new cycle at lowest drain voltage.
(2) Start of new cycle in a classical Pulse Width Modulation (PWM) system without valley detection.
Fig 10. Signals for valley switching
7.3.3 Current mode control (FBSENSE pin)
Current mode control is used for the flyback converter for its good line regulation.
The primary current is sensed by the FBSENSE pin across external resistor R SENSE2
(see Figure 3 ) and compared with an internal control voltage. The internal control voltage
is proportional to the FBCTRL pin voltage (see Figure 11 ).
The FBSENSE pin outputs a current of 3 μ A (typical). This current runs through resistors
R S2 and R SS2 from the FBSENSE pin to the sense resistor, R SENSE2 and creates an offset
voltage (See Figure 3 ). With this offset voltage, the minimum peak current of the flyback
can be adjusted. Adjusting the minimum peak current level, will change the frequency
reduction slope (See Figure 8).
TEA1752T_LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 24 June 2010
? NXP B.V. 2010. All rights reserved.
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