参数资料
型号: TEA5766UK/N1,023
厂商: NXP SEMICONDUCTORS
元件分类: 接收器
英文描述: FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
封装: 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25
文件页数: 57/59页
文件大小: 273K
代理商: TEA5766UK/N1,023
TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
7 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
7.8 IF lter
Fully integrated IF lter with a center frequency of 225 kHz.
7.9 FM demodulator
Fully integrated FM quadrature demodulator.
7.10 IF counter
7.10.1 IF counter correct channel checking
The received RF signal is converted down to a 225 kHz Intermediate Frequency (IF). The
IF is measured by means of a frequency counter. A correct IF frequency measurement
result indicates that the radio is tuned to a valid channel and not to an image or a channel
with high interference. The 7-bit IF counter output can be read via the control interface.
The IF counter is continuously active and can be read at any time via the bus. It also
activates a ag when the IF count result is outside the IF count valid result window; see
7.10.2 IF counter count time
Before a tuning cycle is initiated the IF count period can be set to 2 ms or to 15.6 ms with
bit IFCTC in register TNCTRL (see Table 16). When the IF count period is set to 2 ms,
initiating the tuning algorithm with a preset (SM = 0) will always give an RDS update as
shown in Section 7.21. In case the IF count time is set to 15.6 ms the tuning owchart of
Section 7.20 is used. Once tuned, the IF count period is always 15.6 ms.
7.11 Level voltage generator and level analog-to-digital converter
The level voltage reects the received eld strength at the antenna. The analog level
voltage is digitized to 4 bits by the level Analog-to-Digital Converter (ADC). This level ADC
is continuously active and the output can be read at any time via the control interface. The
level ADC information is used during search as well as preset tuning to compare the
received signal strength with a search stop level (see Section 8.2.5). A ag will be set to
indicate that the level voltage is reduced below a programmable threshold value (see
Section 8.2.5). The threshold value is relative to the search stop level. The hysteresis
between the search stop level and the threshold level can be selected by bit LHSW (see
When the ADC level is set to its minimum value 3, the search algorithm will only stop at
channels having an RF level higher than or equal to ADC level 3. After completing the
search algorithm and being tuned to a station, due to the hysteresis the effective limit will
be set to 0. This means that the continuous ADC level check will never set the LEVFLAG.
7.12 Mute
7.12.1 Soft mute
The low-pass ltered level voltage drives the softened attenuator. At low RF input levels,
the audio output is faded and hence also the noise. The softened function can be turned
on/off via the control interface, bit SMUTE in register TNCTRL (see Table 16).
相关PDF资料
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TEA5766UK/N1,118 FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
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