参数资料
型号: TEA5766UK/N1,118
厂商: NXP SEMICONDUCTORS
元件分类: 接收器
英文描述: FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
封装: 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25
文件页数: 25/59页
文件大小: 273K
代理商: TEA5766UK/N1,118
TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
31 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
10.2 I2C-bus
The full I2C-bus specication can be found in
The I2C-bus specication, version 2.1,
January 2000.
The I2C-bus specication is based on version 2.1, January 2000, expanded by the
following denitions:
The chip has two I2C-bus addresses:
FM radio: 001 0000[R/W] starts at byte 0R or byte 0W
RDS part: 001 0001[R/W] starts at byte 12R or byte 7W
Structure of the I2C-bus:
Slave transceiver, subaddresses not used.
Maximum LOW-level input: VIL = 0.3 × VVREFDIG
Minimum HIGH-level input: VIH = 0.7 × VVREFDIG
10.2.1 Data transfer to the TEA5766UK
The data transfer has to be in the order shown in Figure 14. The bit 0 (LSB) = 0 of the
address indicates a WRITE operation to the TEA5766UK, indicated by the R/W bit of
the I2C-bus address.
Bit 7 of each byte is considered the MSB and has to be transferred as the rst bit of
the byte.
The data becomes valid bitwise at the appropriate falling edge of the clock. A stop
condition after any byte can shorten transmission times. When writing to the
transceiver by using the stop condition before completion of the whole transfer:
The remaining bytes will contain the old information.
If the transfer of a byte is not completed, the new bits will be used, but a new tuning
cycle will not be started.
To speed up RDS trafc it is possible to read all the RDS data and then only write back
byte INTMSK to set the appropriate mask(s) again.
a. Write mode
b. Read mode
(1) S = START condition.
(2) A = acknowledge (SDA LOW).
(3) NAK = non acknowledge (SDA HIGH).
(4) P = STOP condition.
Fig 14. I2C-bus data transfer
001aaf456
CHIP ADDRESS (READ)
DATA BYTE 1
S(1)
A(2)
A
001aaf457
CHIP ADDRESS (WRITE)
DATA BYTE(S)
S(1)
NAK(3)
P(4)
A(2)
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