TFP101, TFP101A
TI PanelBus
DIGITAL RECEIVER
SLDS119 - MARCH 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Supports XGA Resolution
(Output Pixel Rates Up to 86 MHz)
D Digital Visual Interface (DVI) Specification
Compliant1
D True-Color, 24 Bit/Pixel, 16.7M Colors at 1
or 2-Pixels Per Clock
D Laser Trimmed Input Stage for Optimum
Fixed Impedance Matching
D Skew Tolerant Up to One Pixel Clock Cycle
D 4x Over-Sampling
D Reduced Power Consumption – 1.8 V Core
Operation With 3.3 V I/Os and Supplies2
D Reduced Ground Bounce Using Time
Staggered Pixel Outputs
D Lowest Noise and Best Power Dissipation
Using TI PowerPAD
Packaging
D Advanced Technology Using TI 0.18-m
EPIC-5
CMOS Process
D TFP101A Incorporates HSYNC Jitter Immunity3
description
The Texas Instruments TFP101 and TFP101A are TI
PanelBusTM flat panel display products, part of a
comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors
and digital projectors, the TFP101/101A finds applications in any design requiring high-speed digital interface.
The TFP101/101A supports display resolutions up to XGA in 24-bit true color pixel format. The TFP101/101A
offers design flexibilty to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option
for time staggered pixel outputs for reduced ground bounce.
PowerPADTM advanced packaging technology results in best of class power dissipation, footprint, and ultra-low
ground inductance.
The TFP101/101A combines
PanelBusTM circuit innovation with TI’s advanced 0.18-um EPIC-5TM CMOS
process technology, along with TI PowerPADTM package technology to achieve a reliable, low-powered, low
noise, high-speed digital interface solution.
AVAILABLE OPTIONS
PACKAGED DEVICE
TA
100-TQFP
(PZP)
0
°Cto70°C
TFP101CPZP
0
°C to 70°C
TFP101ACPZP
1.
The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for
high-speed digital connection to digital displays The TFP101 and TFP101A are compliant to the DVI Specification Rev. 1.0.
2.
The TFP101/101A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V
supplies.
3.
The TFP101/101A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter
on the transmitted HSYNC signal.
ADV
ANCE
INFORMA
TION
Copyright
2000, Texas Instruments Incorporated
ADVANCE INFORMATION concerns new products in the sampling or
preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PanelBus, PowerPAD and EPIC-5 are trademarks of Texas Instruments Incorporated.
I2C is a licensed bus protocol from Phillips Semiconductor, Inc.