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| 型号： | THS1009IDA |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 2-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| 封装： | GREEN, PLASTIC, TSSOP-32 |
| 文件页数： | 19/30页 |
| 文件大小： | 294K |
| 代理商： | THS1009IDA |
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THS1009
SLAS287A – AUGUST 2000 – REVISED DECEMBER 2002
www.ti.com
26
ANALOG INPUT CONFIGURATION AND REFERENCE VOLTAGE
The THS1009 features two analog input channels. These can be configured for either single-ended or differential
operation. Figure 33 shows a simplified model, where a single-ended configuration for channel AINP is selected. The
reference voltages for the ADC itself are VREFP and VREFM (either internal or external reference voltage). The analog
input voltage range is between VREFM to VREFP. This means that VREFM defines the minimum voltage and VREFP
defines the maximum voltage, which can be applied to the ADC. The internal reference source provides the voltage
VREFM of 1.5 V and the voltage VREFP of 3.5 V (see also section Reference Voltage). The resulting analog input
voltage swing of 2 V can be expressed by:
V
REFM v
AINP
v V
REFP
10-Bit
ADC
VREFP
VREFM
AINP
Figure 33. Single-Ended Input Stage
A differential operation is desired for many applications due to better signal-to-noise ration. Figure 34 shows a
simplified model for the analog inputs AINM and AINP, which are configured for differential operation. The differential
operation mode provides in terms of performance benefits over the single-ended mode and is therefore
recommended for best performance. The THS1009 offers 1 differential analog input and in the single-ended mode
2 analog inputs. If the analog input architecture is differential, common-mode noise and common-mode voltages can
be rejected. Additional details for both modes are given below.
10-Bit
ADC
VREFP
VREFM
AINP
Σ
VADC
AINM
+
–
Figure 34. Differential Input Stage
In comparison to the single-ended configuration it can be seen that the voltage, VADC, which is applied at the input
of the ADC is the difference between the input AINP and AINM. The voltage VADC can be calculated as follows:
V
ADC +
ABS(AINP–AINM)
An advantage to single-ended operation is that the common-mode voltage
V
CM +
AINM
) AINP
2
can be rejected in the differential configuration, if the following condition for the analog input voltages is true:
AGND
v AINM, AINP v AV
DD
1V
v V
CM v
4V
(1)
(2)
(3)
(4)
(5)
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| THS1009IDAG4 | 功能描述:模数转换器 - ADC 10-Bit 8 MSPS Dual Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1009IDAR | 制造商:TI 制造商全称:Texas Instruments 功能描述:10-BIT, 2 ANALOG INPUT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER |
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| THS10100RJ | 制造商:TE Connectivity 功能描述:RESISTOR WIREWOUND 100OHM 10W 5% |
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